SLVSGG5C november   2021  – april 2023 TPS2597

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 8.3.2 Overvoltage Lockout (OVLO)
      3. 8.3.3 Overvoltage Clamp (OVC)
      4. 8.3.4 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.4.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.4.2 Circuit-Breaker
        3. 8.3.4.3 Active Current Limiting
        4. 8.3.4.4 Short-Circuit Protection
      5. 8.3.5 Analog Load Current Monitor
      6. 8.3.6 Overtemperature Protection (OTP)
      7. 8.3.7 Fault Response and Indication (FLT)
      8. 8.3.8 Power-Good Indication (PG)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Single Device, Self-Controlled
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Device Selection
        2. 9.2.2.2 Setting Undervoltage and Overvoltage Thresholds
        3. 9.2.2.3 Setting Output Voltage Rise Time (tR)
        4. 9.2.2.4 Setting Power-Good Assertion Threshold
        5. 9.2.2.5 Setting Overcurrent Threshold (ILIM)
        6. 9.2.2.6 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.2.3 Application Curves
    3. 9.3 Parallel Operation
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
      2. 9.4.2 Output Short-Circuit Measurements
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4 Thermal Information

THERMAL METRIC (1) TPS2597xx UNIT
RPW (QFN)
10 PINS
RθJA Junction-to-ambient thermal resistance 49.7(2) °C/W
71.8(3) °C/W
RθJB Junction-to-board thermal resistance 15.7 °C/W
ΨJT Junction-to-top characterization parameter 2.1(2) °C/W
Junction-to-top characterization parameter 1.3(3) °C/W
ΨJB Junction-to-board characterization parameter 23 (2) °C/W
14.5 (3) °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) Based on simulations conducted with the device mounted on a custom 4-layer PCB (2s2p) with 8 thermal vias under device.
(3) Based on simulations conducted with the device mounted on a JEDEC 4-layer PCB (2s2p) with no thermal vias under device.