SLVSF24C december   2020  – may 2023 TPS272C45

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
    1. 6.1 Recommended Connections for Unused Pins
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SNS Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Programmable Current Limit
        1. 9.3.1.1 Inrush Current Handling
        2. 9.3.1.2 Calculating RILIMx
        3. 9.3.1.3 Configuring ILIMx From an MCU
      2. 9.3.2 Low Power Dissipation
      3. 9.3.3 Protection Mechanisms
        1. 9.3.3.1 Short-Circuit Protection
          1. 9.3.3.1.1 VS During Short-to-Ground
        2. 9.3.3.2 Inductive Load Demagnetization
        3. 9.3.3.3 Thermal Shutdown
        4. 9.3.3.4 Undervoltage Lockout on VS (UVLO)
        5. 9.3.3.5 Undervoltage Lockout on Low Voltage Supply (VDD_UVLO)
        6. 9.3.3.6 Power-Up and Power-Down Behavior
        7. 9.3.3.7 Overvoltage Protection (OVPR)
      4. 9.3.4 Diagnostic Mechanisms
        1. 9.3.4.1 Current Sense
          1. 9.3.4.1.1 RSNS Value
            1. 9.3.4.1.1.1 Current Sense Output Filter
        2. 9.3.4.2 Fault Indication
          1. 9.3.4.2.1 Fault Event Diagrams
        3. 9.3.4.3 Short-to-Supply or Open-Load Detection
          1. 9.3.4.3.1 Detection With Switch Enabled
          2. 9.3.4.3.2 Detection With Switch Disabled
        4. 9.3.4.4 Current Sense Resistor Sharing
    4. 9.4 Device Functional Modes
      1. 9.4.1 Off
      2. 9.4.2 Diagnostic
      3. 9.4.3 Active
      4. 9.4.4 Fault
  11. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 IEC 61000-4-5 Surge
      2. 10.1.2 Inverse Current
      3. 10.1.3 Loss of GND
      4. 10.1.4 Paralleling Channels
      5. 10.1.5 Thermal Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 RILIM Calculation
        2. 10.2.2.2 Diagnostics
          1. 10.2.2.2.1 Selecting the RISNS Value
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.1.3 Configuring ILIMx From an MCU

In many situations, modules like to allow the current limit to be set programmatically from an MCU. This action enables a module to set current limits to fit the load after determining what load is plugged in. As described, the TPS272C45 current limits are set by RILIMx. However, the RILIMx that is seen by the device can be configured through small external FETs as shown in Figure 9-5.

GUID-20211123-SS0I-JP0J-DSDL-NKLDDSNQKTBB-low.svgFigure 9-5 Dynamic ILIMx Control

For example, RILIM1_1 can set the device to 500-mA ILIM while RILIM1_2 can set the device at 2-A ILIM. After the MCU realizes how much current draw is required by the load, the MCU can drive one of the series FET's to set the ILIM to be ideal for the specific load. The current limit (ILIM1 and ILIM2) thresholds can be changed dynamically, but the inrush current limit delay set with the ILIMD resistor cannot be changed after powerup.

The external FET switches used to dynamically adjust the current limit must be chosen with a minimum capacitance (Coss) from the drain the ground. The total capacitance to PCB ground at the ILMx pins including from traces must be limited to less than 100 pF.