SLVSFZ2C April   2023  – February 2024 TPS274C65

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1.     7
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 SPI Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Diagrams
      2. 8.3.2 SPI Mode Operation
        1. 8.3.2.1 Diagnostic Bit Behavior
      3. 8.3.3 Programmable Current Limit
        1. 8.3.3.1 Inrush Current Handling
      4. 8.3.4 DO_EN Feature
      5. 8.3.5 Protection Mechanisms
        1. 8.3.5.1 Overcurrent Protection
        2. 8.3.5.2 Short Circuit Protection
          1. 8.3.5.2.1 VS During Short-to-Ground
        3. 8.3.5.3 Inductive-Load Switching-Off Clamp
        4. 8.3.5.4 Inductive Load Demagnetization
        5. 8.3.5.5 Thermal Shutdown
        6. 8.3.5.6 Undervoltage protection on VS
        7. 8.3.5.7 Undervoltage Lockout on Low Voltage Supply (VDD_UVLO)
        8. 8.3.5.8 Power-Up and Power-Down Behavior
        9. 8.3.5.9 Reverse Current Blocking
      6. 8.3.6 Diagnostic Mechanisms
        1. 8.3.6.1 Current Sense
          1. 8.3.6.1.1 RSNS Value
            1. 8.3.6.1.1.1 SNS Output Filter
        2. 8.3.6.2 Fault Indication
          1. 8.3.6.2.1 Current Limit Behavior
        3. 8.3.6.3 Short-to-Battery and Open-Load Detection
        4. 8.3.6.4 On-State Wire-Break Detection
        5. 8.3.6.5 Off State Wire-Break Detection
        6. 8.3.6.6 ADC
      7. 8.3.7 LED Driver
    4. 8.4 Device Functional Modes
      1. 8.4.1 OFF/POR
      2. 8.4.2 INIT
      3. 8.4.3 Active
    5. 8.5 TPS274C65BS Available Registers List
    6. 8.6 TPS274C65 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 IEC 61000-4-5 Surge
        2. 9.2.2.2 Loss of GND
        3. 9.2.2.3 Paralleling Channels
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.3 Programmable Current Limit

The TPS274C65xS integrates a dual stage adjustable current limit. For the most efficient and reliable output protection, the current limit can be set as close to the DC current level as possible. However often systems require high inrush current handling as well (example incandescent lamp and capacitive loads). By integrating a dual stage current limit, the TPS274C65xS enables robust DC current limiting while still allowing flexible inrush handling.

A lower current limit lowers fault energy and current during a load failure event such as a short-circuit or a partial load failure. By lowering fault energy and current, the overall system improves through:

  • Reduced size and cost in current carrying components such as PCB traces and module connectors
  • Less disturbance at the power supply (VS pin) during a short circuit event
  • Less additional budget for the power supply to account for overload currents in one channel or more
  • Improved protection of the downstream load
Table 8-3 Current Limit Setting Table for TPS274C65ASH

ILIM_REG_xx[3]

ILIM_REG_xx[2]

ILIM_REG_xx[1]

ILIM_REG_xx[0]

Typical ILIM Threshold(A)

0

0

0

0

0.29

0

0

0

1

0.38

0

0

1

0

0.48

0

0

1

1

0.57

0

1

0

0

0.67

0

1

0

1

0.76

0

1

1

0

0.86

0

1

1

1

0.96

1

0

0

0

1.15

1

0

0

1

1.33

1

0

1

0

1.52

1

0

1

1

1.71

1

1

0

0

1.9

1

1

0

1

2.07

1

1

1

0

2.26

1

1

1

1

2.45
Table 8-4 Current Limit Setting Table for TPS274C65AS, TPS274C65BS

ILIM_REG_xx[3]

ILIM_REG_xx[2]

ILIM_REG_xx[1]

ILIM_REG_xx[0]

Typical ILIM Threshold(A)

0

0

0

0

0.25

0

0

0

1

0.33

0

0

1

0

0.4

0

0

1

1

0.48

0

1

0

0

0.56

0

1

0

1

0.67

0

1

1

0

0.72

0

1

1

1

0.85

1

0

0

0

1

1

0

0

1

1.1

1

0

1

0

1.25

1

0

1

1

1.5

1

1

0

0

1.6

1

1

0

1

1.75

1

1

1

0

1.9

1

1

1

1

2.2
Table 8-5 Inrush Current Period Setting Table

ILIM_REG_xx[7]

ILIM_REG_xx[6]

ILIM_REG_xx[5]

ILIM_REG_xx[4]

Inrush Period (ms)

0

0

0

0

0

0

0

0

1

2

0

0

1

0

4

0

0

1

1

6

0

1

0

0

8

0

1

0

1

10

0

1

1

0

12

0

1

1

1

16

1

0

0

0

20

1

0

0

1

24

1

0

1

0

28

1

0

1

1

32

1

1

0

0

40

1

1

0

1

48

1

1

1

0

56

1

1

1

1

64
Table 8-6 ILIM Configuration Table
ILIM_CONFIG ILIM level during ILIMDELAY FLT reporting during ILIMDELAY
0 As programmed with INRUSH_LIMIT[1:0] and ILIM_REG_xx[3:0] Fault not reported
1 As programmed with ILIM_REG_xx[3:0] Fault is reported