SNVSCF7A December   2022  – August 2024 TPS3435

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  Timing Diagrams
    10. 6.10 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Timeout Watchdog Timer
        1. 7.3.1.1 tWD Timer
        2. 7.3.1.2 Watchdog Enable Disable Operation
        3. 7.3.1.3 tSD Watchdog Start Up Delay
        4. 7.3.1.4 SET Pin Behavior
      2. 7.3.2 Manual RESET
      3. 7.3.3 WDO Output
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Assert Delay
        1. 8.1.1.1 Factory-Programmed Output Assert Delay Timing
        2. 8.1.1.2 Adjustable Capacitor Timing
      2. 8.1.2 Watchdog Timer Functionality
        1. 8.1.2.1 Factory-Programmed Timing Options
        2. 8.1.2.2 Adjustable Capacitor Timing
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Monitoring a Standard Microcontroller for Timeouts
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting the Watchdog Timeout Period
          2. 8.2.1.2.2 Setting Output Assert Delay
          3. 8.2.1.2.3 Setting the Startup Delay
          4. 8.2.1.2.4 Calculating the WDO Pullup Resistor
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 WDO Output

The TPS3435 device offers WDO output pin. WDO output is asserted when MR pin voltage is lower than 0.3 X VDD or watchdog timer error is detected.

The output is asserted for tWDO time when any relevant events described above are detected, except for MR event. The time tWDO can be programmed by connecting a capacitor between CRST pin and GND or the device asserts tWDO for fixed time duration as selected by orderable part number. Refer Section 4 section for all available options.

Equation 2 describes the relationship between capacitor value and the time tWDO. Make sure the capacitance meets the recommended operating range. Capacitance outside the recommended range can lead to incorrect operation of the device.

Equation 2. tWDO (sec) = 4.95 x 106 x CCRST (F)

TPS3435 also offers a unique option of latched output. An orderable with latched output holds the output in asserted state indefinitely until the device is power cycled or the error condition is addressed. If the output is latched due to MR pin low voltage, the output latch is released when MR pin voltage rises above 0.7 x VDD level. If the output is latched due to watchdog timer error, the output latch is be released when a WDI negative edge is detected or the device is shutdown and powered up again. Figure 7-13 shows timing behavior of the device with latched output configuration.

TPS3435 Output Latch Timing BehaviorFigure 7-13 Output Latch Timing Behavior