SLVSGE8A november 2022 – june 2023 TPS35-Q1
PRODUCTION DATA
The TPS35-Q1 also offers programmable reset delay option when using pinout A and B. The TPS35-Q1 can be programmed to have a desired reset delay by connecting a capacitor between CRST pin and GND. The typical delay time resulting from a given external capacitance on the CRST pin can be calculated by Equation 3 , where tD is the reset delay time in seconds and CCRST is the capacitance in farads.
To minimize the difference between the calculated reset delay time and the actual reset delay time, use a use a high-quality ceramic dielectric COG capacitor and minimize parasitic board capacitance around this pin. Table 9-1 lists the reset delay time ideal capacitor values for CCRST.
CCRST | RESET DELAY TIME (tD) | UNIT | ||
---|---|---|---|---|
MIN (1) | TYP | MAX (1) | ||
10 nF | 39.6 | 49.5 | 59.4 | ms |
100 nF | 396 | 495 | 594 | ms |
1 μF | 3960 | 4950 | 5940 | ms |