SLVSGE8A november   2022  – june 2023 TPS35-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Timing Diagrams
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Voltage Supervisor
      2. 8.3.2 Timeout Watchdog Timer
        1. 8.3.2.1 tWD Timer
        2. 8.3.2.2 Watchdog Enable Disable Operation
        3. 8.3.2.3 tSD Watchdog Start Up Delay
        4. 8.3.2.4 SET Pin Behavior
      3. 8.3.3 Manual RESET
      4. 8.3.4 RESET and WDO Output
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 CRST Delay
        1. 9.1.1.1 Factory-Programmed watchdog Timing
        2. 9.1.1.2 Adjustable Capacitor Timing
      2. 9.1.2 Watchdog Timer Functionality
        1. 9.1.2.1 Factory-Programmed watchdog Timing
        2. 9.1.2.2 Adjustable Capacitor Timings
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1: Monitoring a Microcontroller Supply Voltage and Watchdog Timer
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Setting the Voltage Threshold
          2. 9.2.1.2.2 Meeting the Watchdog Timeout Period
          3. 9.2.1.2.3 Setting the Reset Delay
          4. 9.2.1.2.4 Setting the Startup Delay and Output Topology
          5. 9.2.1.2.5 Calculating the RESET Pullup Resistor
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1.1.2 Adjustable Capacitor Timing

The TPS35-Q1 also offers programmable reset delay option when using pinout A and B. The TPS35-Q1 can be programmed to have a desired reset delay by connecting a capacitor between CRST pin and GND. The typical delay time resulting from a given external capacitance on the CRST pin can be calculated by Equation 3 , where tD is the reset delay time in seconds and CCRST is the capacitance in farads.

Equation 3. tD (sec) = 4.95 × 106 × CCRST (F)

To minimize the difference between the calculated reset delay time and the actual reset delay time, use a use a high-quality ceramic dielectric COG capacitor and minimize parasitic board capacitance around this pin. Table 9-1 lists the reset delay time ideal capacitor values for CCRST.

Table 9-1 Reset Delay Time for Common Ideal Capacitor Values
CCRST

RESET

DELAY TIME (tD)		UNIT
MIN (1)TYPMAX (1)
10 nF39.649.559.4ms
100 nF396495594ms
1 μF396049505940ms
(1) Minimum and maximum values are calculated using ideal capacitors.