SLVSGE8B November 2022 – August 2024 TPS35-Q1
PRODUCTION DATA
The TPS35-Q1 supports watchdog enable or disable functionality. This functionality is critical for different use cases as listed below.
The TPS35-Q1 supports watchdog enable or disable functionality through either WD-EN pin (pin configuration C) or SET[1:0] = 0b'01 (pin configuration B) logic combination. For a given pinout only one of these two methods is available for the user to disable watchdog operation.
For a pinout which offers a WD-EN pin, the watchdog enable disable functionality is controlled by the logic state of WD-EN pin. Drive WD-EN = 1 to enable the watchdog operation or drive WD-EN = 0 to disable the watchdog operation. The WD-EN pin can be toggled any time during the device operation. The Figure 7-7 diagram shows timing behavior with WD-EN pin control.
SET[1:0] = 0b'01 combination can be used to disable watchdog operation with a pinout which offers SET1 and SET0 pins, but does not include WD-EN pin. The SET pin logic states can be changed at any time during watchdog operation. Refer Section 7.3.2.4 section for additional details regarding SET[1:0] pin behavior.
Pinout options A, B offer watchdog timer control using a capacitance connected between CWD and GND pin. A capacitance value higher than recommended or connect to GND leads to watchdog functionality getting disabled. Capacitance based disable operation overrides the other two options mentioned above. Changing capacitance on the fly does not enable or disable watchdog operation. A power supply recycle or device recovery after UV fault, MR low event is needed to detect change in capacitance.
Ongoing watchdog frame is terminated when watchdog is disabled. WDO stays deasserted when watchdog operation is disabled. For a pinout with only RESET output, the RESET can assert if supply supervisor error occurs. When enabled the device immediately enters tWD frame and start watchdog monitoring operation.