SLVSGE8B November   2022  – August 2024 TPS35-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Supervisor
      2. 7.3.2 Timeout Watchdog Timer
        1. 7.3.2.1 tWD Timer
        2. 7.3.2.2 Watchdog Enable Disable Operation
        3. 7.3.2.3 tSD Watchdog Start Up Delay
        4. 7.3.2.4 SET Pin Behavior
      3. 7.3.3 Manual RESET
      4. 7.3.4 RESET and WDO Output
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 CRST Delay
        1. 8.1.1.1 Factory-Programmed watchdog Timing
        2. 8.1.1.2 Adjustable Capacitor Timing
      2. 8.1.2 Watchdog Timer Functionality
        1. 8.1.2.1 Factory-Programmed watchdog Timing
        2. 8.1.2.2 Adjustable Capacitor Timings
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Monitoring a Microcontroller Supply Voltage and Watchdog Timer
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting the Voltage Threshold
          2. 8.2.1.2.2 Meeting the Watchdog Timeout Period
          3. 8.2.1.2.3 Setting the Reset Delay
          4. 8.2.1.2.4 Setting the Startup Delay and Output Topology
          5. 8.2.1.2.5 Calculating the RESET Pullup Resistor
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Voltage Supervisor

The TPS35-Q1 offers high accuracy under voltage supervisor function at very low quiescent current. The voltage supervisor function is always active. After the device powers up from VDD < VPOR, the RESET and WDO outputs are actively driven when VDD is greater than VPOR. The device starts monitoring the supply level when the VDD voltage is greater than 1.04V. The device holds the RESET pin asserted for tSTRT + tD time after the VDD > VIT+ (VIT- + VHYS). Refer Section 7.3.4 for the tD value computation. For a capacitor based tD delay option, the RESET is asserted for tSTRT + 2ms time if the CRST pin is open.

Device pinout options A to C offer only RESET output. In these devices the internal RESET output from supervisor and WDO output from watchdog timer are ANDed together to drive the external RESET output.

The supervisor offers wide range of fixed monitoring thresholds (VIT-) from 1.05V to 5.40V in steps of 50mV. The device asserts the RESET output when the VDD signal falls below VIT- threshold. The device offers hysteresis functionality for voltage supervision. This makes sure the supply has recovered above the monitoring threshold before the RESET output is deasserted. The TPS35-Q1 typical voltage hysteresis (VHYS) is 5%. Along with the voltage hysteresis, the device keeps the RESET output asserted for time duration tD after the supply has risen above VIT+. The RESET output assert duration changes from tD to tSTRT + tD if the VDD signal is ramping from voltage < VPOR. The tD time duration can be programmable using an external capacitor or fixed time options offered by the device.

The typical timing behavior for a voltage supervisor and the RESET output is showcased in Figure 7-5. The voltage supervisor monitoring output has higher priority over watchdog functionality. If the device voltage supervisor output is asserted, the watchdog functionality is disabled including WDO assert control. The device resumes watchdog related functionality only after the supply is stable and the tD time duration has elapsed.

TPS35-Q1 Voltage Supervisor Timing DiagramFigure 7-5 Voltage Supervisor Timing Diagram