SNVSCF5A June   2023  – December 2023 TPS35

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  Timing Diagrams
    10. 6.10 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Supervisor
      2. 7.3.2 Timeout Watchdog Timer
        1. 7.3.2.1 tWD Timer
        2. 7.3.2.2 Watchdog Enable Disable Operation
        3. 7.3.2.3 tSD Watchdog Start Up Delay
        4. 7.3.2.4 SET Pin Behavior
      3. 7.3.3 Manual RESET
      4. 7.3.4 RESET and WDO Output
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Assert Delay
        1. 8.1.1.1 Factory-Programmed Output Assert Delay Timing
        2. 8.1.1.2 Adjustable Capacitor Timing
      2. 8.1.2 Watchdog Timer Functionality
        1. 8.1.2.1 Factory-Programmed Timing Options
        2. 8.1.2.2 Adjustable Capacitor Timing
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Monitoring a Microcontroller Supply Voltage and Watchdog Timer
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting the Voltage Threshold
          2. 8.2.1.2.2 Meeting the Watchdog Timeout Period
          3. 8.2.1.2.3 Setting the Reset Delay
          4. 8.2.1.2.4 Setting the Startup Delay and Output Topology
          5. 8.2.1.2.5 Calculating the RESET Pullup Resistor
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2 Timeout Watchdog Timer

The TPS35 offers high precision timeout watchdog timer monitoring. The device is available in multiple pinout options A to K which support multiple features to meet ever expanding needs of various applications. Make sure a correct pinout is selected to meet the application needs.

The timeout watchdog is active when the VDD voltage is higher than the VIT- + VHYS and the RESET is deasserted after the tD time. The watchdog stays active as long as VDD > VIT- and watchdog is enabled. TPS35 family offers various startup time delay options to make sure enough time is available for the host to complete boot operation. Please refer Section 7.3.2.3 for additional details.

The timeout watchdog timer monitors the WDI pin for falling edge in the time frame defined by tWD time period. Refer Section 7.3.2.1 section to arrive at the relevant tWD value needed for application. The timer value is reset when a valid falling edge is detected on WDI pin in the tWD time duration. When a valid WDI transition is not detected in tWD time, the device asserts RESET output for pinout options A, B, C, J and K or WDO output for pinout D. The RESET or WDO is asserted for time tD. Refer Section 7.3.4 to arrive at the relevant tD value needed for application.

Figure 7-8 shows the basic operation for timeout watchdog timer operation. The TPS35 watchdog functionality supports multiple features. Details are available in following sub sections.

GUID-20220607-SS0I-XPSC-2RNL-WM9Q9TG7THPS-low.svgFigure 7-8 Timeout Watchdog Timer Operation