SBVS251A January   2015  – February 2024 TPS3702

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input (SENSE)
      2. 6.3.2 Outputs (UV, OV)
      3. 6.3.3 User-Configurable Accuracy Band (SET)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation (VDD > UVLO)
      2. 6.4.2 Undervoltage Lockout (V(POR) < VDD < UVLO)
      3. 6.4.3 Power-On Reset (VDD < V(POR))
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Window Voltage Detector Considerations
      2. 7.1.2 Input and Output Configurations
      3. 7.1.3 Immunity to SENSE Pin Voltage Transients
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Evaluation Module
      2. 10.1.2 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.2 Input and Output Configurations

Figure 7-3 to Figure 7-5 illustrate examples of the various input and output configurations.

GUID-20240130-SS0I-RB6C-XVZC-QFVBNWCWGRXL-low.svgFigure 7-3 Interfacing to Voltages Other Than VDD
GUID-20240131-SS0I-6014-ZGG1-VKTQNRB4XRM8-low.svgFigure 7-4 Monitoring the Same Voltage as VDD with Wired-OR Logic
GUID-20240131-SS0I-DDV4-3RW2-XHRR7VG5BVVP-low.svgFigure 7-5 Monitoring a Voltage Other Than VDD with Wired-OR Logic

Note that the SENSE input can also monitor voltages that are higher than VSENSE (max) or that may not be designed for rail voltages with the use of an external resistor divider network. If a resistor divider is used to reduce the voltage on the SENSE pin, make sure that the ISENSE current is accounted for so the accuracy is not unexpectedly affected. As a general approximation, the current flowing through the resistor divider to ground must be greater than 100 times the current going into the SENSE pin. See application report Optimizing Resistor Dividers at a Comparator Input (SLVA450) for a more in-depth discussion on setting an external resistor divider.