SNVSBZ2E
March 2021 – December 2023
TPS3704
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Nomenclature
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Timing Diagrams
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
VDD
7.3.2
SENSEx Input
7.3.2.1
Immunity to SENSEx Pins Voltage Transients
7.3.2.1.1
SENSEx Hysteresis
7.3.3
RESETx/RESETx
7.4
Device Functional Modes
7.4.1
Normal Operation (VDD > VDD(MIN))
7.4.2
Undervoltage Lockout (VPOR < VDD < UVLO)
7.4.3
Power-On Reset (VDD < VPOR)
8
Application and Implementation
8.1
Application Information
8.1.1
Voltage Threshold Accuracy
8.1.2
Adjustable Voltage Thresholds
8.2
Typical Application
8.2.1
Design 1: Multi-Rail Window Monitoring for Microcontroller Power Rails
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.2
Design 2: Manual Self-Test Option for Enhanced Functional Safety Use Cases
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power Supply Guidelines
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Nomenclature
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDF|8
MPDS569D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsbz2e_oa
snvsbz2e_pm
1
Features
Up to four independent voltage supervisor channels:
Fixed and adjustable window, UV, or OV voltage options. See
Table 9-3
for available options.
Easy to use
calculator tool
for adjustable versions
High threshold accuracy: ±0.25% (typical)
Built-in precision hysteresis: 0.75% (typical)
Fixed time delay options
Open drain outputs
Designed to support
Arm-based processors
such as TDA4, Sitara AM33xx, and advanced FPGAs and SOCs
Low quiescent current: 15 μA (maximum)
Temperature range: –40°C to +125°C
Functional Safety-Compliant
Systematic capability up to SIL 3
Hardware capability up to SIL 1