SNVSBZ2E March   2021  – December 2023 TPS3704

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Nomenclature
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD
      2. 7.3.2 SENSEx Input
        1. 7.3.2.1 Immunity to SENSEx Pins Voltage Transients
          1. 7.3.2.1.1 SENSEx Hysteresis
      3. 7.3.3 RESETx/RESETx
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation (VDD > VDD(MIN))
      2. 7.4.2 Undervoltage Lockout (VPOR < VDD < UVLO)
      3. 7.4.3 Power-On Reset (VDD < VPOR)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Voltage Threshold Accuracy
      2. 8.1.2 Adjustable Voltage Thresholds
    2. 8.2 Typical Application
      1. 8.2.1 Design 1: Multi-Rail Window Monitoring for Microcontroller Power Rails
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Design 2: Manual Self-Test Option for Enhanced Functional Safety Use Cases
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Guidelines
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.2 Detailed Design Procedure

Determine which version of the TPS3704x best suits the monitored rail (VMON) and window tolerances found on Table 9-3. The TPS3704x allows overvoltage and undervoltage monitoring for precise voltage supervision of common rails between 0.4 V and 5.55 V. This application calls for very tight monitoring of the rail with only ±5% of variation allowed on the 1.2-VCORE rail. To ensure this requirement is met, the TPS37042 was chosen for its ±3% thresholds. The 3.3-VI/O is more flexible and can operate up to 8% variance. Since the TPS3704x comes in various tolerance options, the ±6% thresholds can be chosen for this voltage rail. To calculate the worst-case for VIT+(OV) and VIT-(UV), the accuracy must also be taken into account. The worst-case for VIT+(OV) and VIT-(UV) can be calculated shown in Equation 5 and Equation 6 respectively:

Equation 5. VIT+(OV-Worst Case) = VMON × (1 + %Threshold ) × (1 + %Accuracy) = 1.2 × (1.03) × (1.01) = 1.2484 V
Equation 6. VIT-(UV-Worst Case) = VMON × (1 - %Threshold) × (1 - %Accuracy) = 1.2 × (0.97) × (0.99) = 1.1524V

Hysteresis is also needed to be taken into account when determining the OV and UV thresholds such that the release point after the fault is higher than the power supply tolerance limits. Refer to Figure 6-1 for more details.

When the outputs switch to a high impedance state, the rise time of the RESETx/RESETx pin depends on the pull-up resistance and the capacitance on that node. Choose pull-up resistors that satisfy both the downstream timing requirements and the sink current required to have a VOL low enough for the application; 10 kΩ to 1 MΩ resistors are a good choice for low-capacitive loads.