SNVSCM8A October   2023  – December 2023 TPS3762

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Specifications
    2. 6.2 Absolute Maximum Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Requirements
    7. 6.7 Timing Requirements
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristic
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Voltage (VDD)
        1. 7.3.1.1 Undervoltage Lockout (VPOR < VDD < UVLO)
        2. 7.3.1.2 Power-On Reset (VDD < VPOR )
      2. 7.3.2 SENSE
        1. 7.3.2.1 Reverse Polarity Protection
        2. 7.3.2.2 SENSE Hysteresis
      3. 7.3.3 Output Logic Configurations
        1. 7.3.3.1 Open-Drain
        2. 7.3.3.2 Active-Low (RESET)
        3. 7.3.3.3 Latching
      4. 7.3.4 User-Programmable Reset Time Delay
        1. 7.3.4.1 Reset Time Delay Configuration
      5. 7.3.5 User-Programmable Sense Delay
        1. 7.3.5.1 Sense Time Delay Configuration
      6. 7.3.6 Built-In Self-Test
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Adjustable Voltage Thresholds
    3. 8.3 Typical Application
      1. 8.3.1 Design 1: SELV Power Supply Monitoring
        1. 8.3.1.1 Design Requirements
        2. 8.3.1.2 Detailed Design Procedure
          1. 8.3.1.2.1 Setting Voltage Threshold
          2. 8.3.1.2.2 Meeting the Sense and Reset Delay
          3. 8.3.1.2.3 Setting Supply Voltage
          4. 8.3.1.2.4 Initiating Built-In Self-Test and Clearing Latch
        3. 8.3.1.3 Application Curves
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Power Dissipation and Device Operation
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TPS3762 is a 65 V input voltage supervisor with 4 μA IDD, 0.9% accuracy, fast detection time, and a Built-In Self-Test feature. This device can be connected directly to 12 V / 24 V industrial SELV power rails for continuous monitoring of overvoltage (OV) and undervoltage (UV) conditions; with its internal resistor divider, TPS3762 offers the smallest total solution size. Wide hysteresis voltage options are available to ignore large voltage transients. Built-in hysteresis on the SENSE pin prevents false reset signals when monitoring a supply voltage rail.

The separate VDD and SENSE pins allow redundancy sought by high-reliability systems and SENSE can monitor higher and lower voltages than VDD. Optional use of external resistors are supported by the high impedance input of the SENSE pin. CTS and CTR pins allow delay adjustability on the falling and rising edges of the RESET signal. The CTS functions as a debouncer by ignoring voltage glitches on the monitored voltage rails.

The TPS3762 is available in a 2.9 mm × 1.6 mm SOT23 8-pin package. TPS3762 operates over -40°C to +150°C TA.

Device Information
PART NUMBERPACKAGE (1)BODY SIZE (NOM)

TPS3762

SOT-23 (8) (DDF)

2.9 mm x 1.6 mm

For package details, see the mechanical drawing addendum at the end of the data sheet.
GUID-20231209-SS0I-QQFS-4GNL-HNH8TPKQ2DXJ-low.svgTypical Application Circuit
GUID-20231209-SS0I-DTZN-7QHH-NVCM5RVBTRNG-low.svgLatch Functionality Waveform