SNVSCM8A
October 2023 – December 2023
TPS3762
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Specifications
6.2
Absolute Maximum Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Requirements
6.7
Timing Requirements
6.8
Timing Diagrams
6.9
Typical Characteristic
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input Voltage (VDD)
7.3.1.1
Undervoltage Lockout (VPOR < VDD < UVLO)
7.3.1.2
Power-On Reset (VDD < VPOR )
7.3.2
SENSE
7.3.2.1
Reverse Polarity Protection
7.3.2.2
SENSE Hysteresis
7.3.3
Output Logic Configurations
7.3.3.1
Open-Drain
7.3.3.2
Active-Low (RESET)
7.3.3.3
Latching
7.3.4
User-Programmable Reset Time Delay
7.3.4.1
Reset Time Delay Configuration
7.3.5
User-Programmable Sense Delay
7.3.5.1
Sense Time Delay Configuration
7.3.6
Built-In Self-Test
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Adjustable Voltage Thresholds
8.3
Typical Application
8.3.1
Design 1: SELV Power Supply Monitoring
8.3.1.1
Design Requirements
8.3.1.2
Detailed Design Procedure
8.3.1.2.1
Setting Voltage Threshold
8.3.1.2.2
Meeting the Sense and Reset Delay
8.3.1.2.3
Setting Supply Voltage
8.3.1.2.4
Initiating Built-In Self-Test and Clearing Latch
8.3.1.3
Application Curves
8.4
Power Supply Recommendations
8.4.1
Power Dissipation and Device Operation
8.5
Layout
8.5.1
Layout Guidelines
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Device Nomenclature
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDF|8
MPDS569D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvscm8a_oa
snvscm8a_pm
6
Specifications