SLVS292F June 2000 – September 2019 TPS3836 , TPS3837 , TPS3838
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
tD | Delay time | VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD,
CT = GND, (see Timing Diagram) |
5 | 10 | 15 | ms | |
VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD,
CT = VDD, (see Timing Diagram) |
100 | 200 | 300 | ||||
tPHL | Propagation (delay) time, high-to-low-level output | VDD to RESET delay (TPS3836, TPS3838) | VIL = VIT – 0.2 V, VIH = VIT + 0.2 V | 10 | μs | ||
VIL = 1.6 V | 50 | ||||||
tPLH | Propagation (delay) time, low-to-high-level output | VDD to RESET delay (TPS3837) | VIL = VIT – 0.2 V, VIH = VIT + 0.2 V | 10 | μs | ||
VIL = 1.6 V | 50 | ||||||
tPHL | Propagation (delay) time, high-to-low-level output | MR to RESET delay (TPS3836, TPS3838) | VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIL = 0.7 × VDD | 0.3 | μs | ||
tPLH | Propagation (delay) time, low-to-high-level output | MR to RESET delay (TPS3837) | VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD,
VIL = 0.7 × VDD |
0.3 | μs |