SNVSCK4A
April 2024 – August 2024
TPS3842-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specification
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Timing Diagram
6.9
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
SENSE Input
7.3.2
SENSE Hysteresis
7.3.3
Selecting the SENSE Delay Time
7.3.4
Selecting the RESET Delay Time
7.3.5
RESET Output
7.4
Device Functional Modes
7.4.1
Normal Operation (VDD > VDD(min))
7.4.2
Above Power-On Reset but Less Than VDD(min) (VPOR < VDD < VDD(min))
7.4.3
Below Power-On Reset (VDD < VPOR)
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Meeting the Sense and Reset Delay
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.2
Documentation Support
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRL|6
MPDS159H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsck4a_oa
snvsck4a_pm
6.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per AEC Q100-002
(1)
±2000
V
Charged device model (CDM), per AEC Q100-011
±750
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.