SBVS300A
November 2016 – September 2021
TPS3851
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Timing Diagrams
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
RESET
7.3.2
Manual Reset MR
7.3.3
UV Fault Detection
7.3.4
Watchdog Mode
7.3.4.1
CWD
7.3.4.2
Watchdog Input WDI
7.3.4.3
Watchdog Output WDO
7.3.4.4
SET1
7.4
Device Functional Modes
7.4.1
VDD is Below VPOR ( VDD < VPOR)
7.4.2
Above Power-On-Reset, But Less Than VDD(min) (VPOR ≤ VDD < VDD(min))
7.4.3
Normal Operation (VDD ≥ VDD(min))
8
Application and Implementation
8.1
Application Information
8.1.1
CWD Functionality
8.1.1.1
Factory-Programmed Timing Options
8.1.1.2
Adjustable Capacitor Timing
8.1.2
Overdrive Voltage
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Monitoring the 1.8-V Rail
8.2.2.2
Calculating RESET and WDO Pullup Resistor
8.2.2.3
Setting the Watchdog
8.2.2.4
Watchdog Disabled During Initialization Period
8.2.3
Glitch Immunity
8.2.4
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Device Nomenclature
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRB|8
MPDS118K
Thermal pad, mechanical data (Package|Pins)
DRB|8
QFND058N
Orderable Information
sbvs300a_oa
sbvs300a_pm
7.2
Functional Block Diagram
Note: R
1
+ R
2
= 4.5 MΩ.