SBVS285 February   2017 TPS3852-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
      2.      Undervoltage Threshold (VITN) Accuracy vs Temperature
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 RESET
      2. 7.3.2 Manual Reset (MR)
      3. 7.3.3 Undervoltage Fault Detection
      4. 7.3.4 Watchdog Mode
        1. 7.3.4.1 SET1
        2. 7.3.4.2 Window Watchdog Timer
        3. 7.3.4.3 Watchdog Input (WDI)
        4. 7.3.4.4 CWD
        5. 7.3.4.5 Watchdog Output (WDO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 VDD is Below VPOR (VDD < VPOR)
      2. 7.4.2 Above Power-On-Reset, But Less Than VDD(min) (VPOR ≤ VDD < VDD(min))
      3. 7.4.3 Normal Operation (VDD ≥ VDD(min))
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 CWD Functionality
        1. 8.1.1.1 Factory-Programmed Timing Options
        2. 8.1.1.2 Adjustable Capacitor Timing
      2. 8.1.2 Overdrive Voltage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Monitoring the 3.3-V Rail
        2. 8.2.2.2 Calculating RESET and the WDO Pullup Resistor
        3. 8.2.2.3 Setting the Window Watchdog
        4. 8.2.2.4 Watchdog Disabled During Initialization Period
      3. 8.2.3 Glitch Immunity
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

at VITN + VHYST ≤ VDD ≤ 6.5 V over the operating temperature range of –40°C ≤ TA, T J ≤ +125°C (unless otherwise noted); the open-drain pullup resistors are 10 kΩ for each output; typical values are at TJ = 25°C
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
GENERAL CHARACTERISTICS
VDD(3) Supply voltage 1.6 6.5 V
IDD Supply current 10 19 µA
RESET FUNCTION
VPOR(2) Power-on-reset voltage IRESET = 15 µA, VOL(MAX) = 0.25 V  0.8 V
VUVLO(1) Undervoltage lockout voltage 1.35 V
VITN Undervoltage threshold accuracy,
entering RESET		 VDD falling VITN – 0.8% VITN + 0.8%
VHYST Hysteresis voltage VDD rising 0.2% 0.5% 0.8%
IMR MR pin internal pullup current VMR = 0 V 500 620 700 nA
WINDOW WATCHDOG FUNCTION
ICWD CWD pin charge current CWD = 0.5 V  337  375 413 nA
VCWD CWD pin threshold voltage 1.192 1.21 1.228 V
VOL RESET, WDO output low VDD = 5 V,
IRESET = IWDO = 3 mA		 0.4 V
ID RESET, WDO output leakage current,
open-drain		 VDD = VITN + VHYST,
VRESET = VWDO = 6.5 V		 1 µA
VIL Low-level input voltage (MR, SET1) 0.25 V
VIH High-level input voltage (MR, SET1) 0.8 V
VIL(WDI) Low-level input voltage (WDI) 0.3 × VDD V
VIH(WDI) High-level input voltage (WDI) 0.8 × VDD V
(1) When VDD falls below UVLO, RESET is driven low.
(2) When VDD falls below VPOR, RESET and WDO are undefined.
(3) During power on, VDD must be a minimum of 1.6 V for at least 300 µs before RESET correlates with VDD.