SLVSA75A July 2010 – August 2015 TPS386596
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | Input, VDD | –0.3 | 7 | V |
VMR, VSENSE1, VSENSE2, VSENSE3, VSENSE4, VRESET | –0.3 | 7 | V | |
Current | RESET pin | 5 | mA | |
Power dissipation | Continuous total | See Thermal Information | ||
Temperature | Operating virtual junction, TJ | –40 | 150 | °C |
Operating ambient, TA | –40 | 125 | ||
Storage, Tstg | –65 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VDD | 1.8 | 6.5 | V | ||
VSENSE(1) | 0 | VDD | V | ||
VMR | 0 | VDD | V | ||
VRESET | 0 | 6.5 | V | ||
RPULL-UP | 6.5 | 100 | 10,000 | kΩ | |
TJ | –40 | 25 | 125 | °C |
THERMAL METRIC(1) | TPS386596 | UNIT | |
---|---|---|---|
DGK (VSSOP) | |||
8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 174 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 45.5 | °C/W |
RθJB | Junction-to-board thermal resistance | 94 | °C/W |
ψJT | Junction-to-top characterization parameter | 1.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 92.7 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VDD | Input supply | 1.8 | 6.5 | V | ||
IDD | Supply current (current into VDD pin) | VCC = 3.3 V, RESET not asserted | 7 | 19 | µA | |
VCC = 6.5 V, RESET not asserted | 7.5 | 22 | µA | |||
Power-on reset voltage(1)(2) | VOL(max) = 0.2 V, IRESET = 15 µA | 0.9 | V | |||
VITn | Negative-going input threshold accuracy | SENSE1 | 2.87 | 2.90 | 2.93 | V |
SENSE2, SENSE3, SENSE4 | 396 | 400 | 404 | mV | ||
VHYS | Hysteresis (positive-going) on VITn | SENSE1 | 25 | 72 | mV | |
SENSE2, SENSE3, SENSE4 | 3.5 | 10 | mV | |||
ISENSE1 | Input current at SENSE1 | VSENSE1 = 3.3 V | 2.2 | 2.75 | 3.3 | µA |
ISENSEn | Input current at SENSEn pin, n = 2, 3, 4 |
VSENSEn = 0.42 V | –25 | 25 | nA | |
td | RESETdelay time | 30 | 50 | 70 | ms | |
VIL | MR logic low input | 0 | 0.3VDD | V | ||
VIH | MR logic high input | 0.7VDD | V | |||
RMR_Pullup | Internal pullup resistor on MR pin to VDD | 100 | kΩ | |||
VOL | Low-level RESET output voltage | IOL = 1 mA | 0.4 | V | ||
SENSEn = 0 V, 1.3 V < VDD < 1.8 V, IOL = 0.4 mA(1) |
0.3 | |||||
ILKG | RESET leakage current | VRESET = 6.5 V, RESET not asserted | –300 | 300 | nA | |
CIN | Input pin capacitance | 5 | pF |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
tW | Input pulse width to SENSEn and MR pins | SENSEm: 1.05 VIT ≥ 0.95 VIT | 4 | μs | ||
MR: 0.7 VDD ≥ 0.3 VDD | 50 | ns |
MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|
tD | RESET delay time | 30 | 50 | 70 | ms |