SNVSC27B October   2022  – January 2025 TPS38700

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device State Diagram
      2. 7.3.2 Built-In Self Test and Configuration Load
      3. 7.3.3 CLK32K
      4. 7.3.4 BACKUP State
      5. 7.3.5 FAILSAFE State
      6. 7.3.6 Transitioning Sequences
        1. 7.3.6.1 Sequence 1: Power Up
        2. 7.3.6.2 Sequence 2: Emergency Power Down
        3. 7.3.6.3 Sequence 3: Sleep Entry
        4. 7.3.6.4 Sequence 4: Sleep Exit
        5. 7.3.6.5 Sequence 5 & 6: Power Down from Active and Sleep States
        6. 7.3.6.6 Sequence 7: Sleep Exit Due to NRST_IN
        7. 7.3.6.7 Sequence 8: RESET Due to NRST_IN
        8. 7.3.6.8 Sequence 9: Failsafe Power Down
        9. 7.3.6.9 Output Sequencing
      7. 7.3.7 I2C
        1. 7.3.7.1 Packet Error Checking (PEC)
    4. 7.4 Register Map Table
      1. 7.4.1 Register Descriptions
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Automotive Multichannel Sequencer and Monitor
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Guidelines
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12.   Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6.6 Sequence 7: Sleep Exit Due to NRST_IN

If NRST_IN pin is enabled, it may be asserted while TPS38700 is in SLEEP state. To aid in proper power state synchronization with the rest of the system, TPS38700 asserts NRST while executing the Sleep exit sequence. The NRST signal is de-asserted when both RST_DLY delay time has passed since last ENx, and the NRST_IN signal is de-asserted (or the connected button is released).

It should be noted that although not depicted in the TPS38700 State Diagram, Figure 7-2, for clarity, this sequence applies also in case of WDT-initiated reset.

TPS38700 Sleep Exit due to NRST_IN Figure 7-13 Sleep Exit due to NRST_IN