SNVSCG1 july   2023 TPS38700S-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device State Diagram
      2. 8.3.2 Sync Functionality
      3. 8.3.3 Transitioning Sequences
        1. 8.3.3.1 Power Up
        2. 8.3.3.2 Power Down
        3. 8.3.3.3 Emergency Power Down
      4. 8.3.4 BACKUP State
      5. 8.3.5 Thermal Shutdown (TSD) State
      6. 8.3.6 I2C
        1. 8.3.6.1 I2C
    4. 8.4 Register Map Table
      1. 8.4.1 Register Descriptions
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Test Implementation
      5. 9.2.5 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Power Supply Guidelines
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14.   Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20230522-SS0I-8Q1L-R9RV-QGWNQZXKN5NJ-low.svgFigure 6-1 RGE Package
24-Pin VQFN
TPS38700 Top View
Table 6-1 Pin Functions
PINI / ODESCRIPTION
NO.TPS38700S-Q1
NAME
1NIRQOInterrupt Pin (open-drain, active-low)
2NRSTOReset Pin (open-drain, active-low)
3

SYNC

I

Active low input needed for enabling and disabling voltage rails during the Power Up and Power Down sequences. For more information check out Section 8.1 and Section 8.3.2.

4ACTIACT pin (logic high starts power up sequence, logic low starts power down sequence)
5SCLII2C clock pin
6SDAI / OI2C data pin
7GPO7OGPO7 (open-drain)
8GPO8OGPO8 (open-drain)
9GPO9OGPO9 (open-drain)
10GPO10OGPO10 (open-drain)
11GPO11OGPO11 (open-drain)
12GPO12OGPO12 (open-drain)
13

NC

NA

Leave pin open circuit. Do not connect to anything.

14

NC

NA

Leave pin open circuit. Do not connect to anything.

15

NC

NA

Leave pin open circuit. Do not connect to anything.

16GND-Ground
17VDD-Power supply
18VBBAT-Backup battery supply. For more information on the backup state check out Section 8.3.4.
19EN1OEnable 1 (open-drain)
20EN2OEnable 2 (open-drain)
21EN3OEnable 3 (open-drain)
22EN4OEnable 4 (open-drain)
23EN5OEnable 5 (open-drain)
24EN6OEnable 6 (open-drain)