SNVSBM4D March   2022  – October 2024 TPS389006-Q1 , TPS389R0-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  I2C
      2. 7.3.2  Auto Mask (AMSK)
      3. 7.3.3  Packet Error Checking (PEC)
      4. 7.3.4  VDD
      5. 7.3.5  MON
      6. 7.3.6  NIRQ
      7. 7.3.7  ADC
      8. 7.3.8  Time Stamp
      9. 7.3.9  NRST
      10. 7.3.10 Register Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Built-In Self Test and Configuration Load
        1. 7.4.1.1 Notes on BIST Execution
      2. 7.4.2 TPS389006/08-Q1,TPS389R0-Q1 Power ON
      3. 7.4.3 General Monitoring
        1. 7.4.3.1 IDLE Monitoring
        2. 7.4.3.2 ACTIVE Monitoring
        3. 7.4.3.3 Sequence Monitoring 1
          1. 7.4.3.3.1 ACT Transitions 0→1
          2. 7.4.3.3.2 SLEEP Transition 1→0
          3. 7.4.3.3.3 SLEEP Transition 0→1
        4. 7.4.3.4 Sequence Monitoring 2
          1. 7.4.3.4.1 ACT Transition 1→0
    5. 7.5 Register Maps
      1. 7.5.1 BANK0 Registers
      2. 7.5.2 BANK1 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Multichannel Sequencer and Monitor
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Guidelines
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Documentation Support
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS389006/08-Q1 device is an ASIL-D compliant six/eight-channel window supervisor IC with two remote sense pins (six channel version) available in a 16-pin 3mm x 3mm QFN package. The TPS389R06-Q1 device is a six channel window supervisor IC with 2 remote sense pins and a Reset output. This high accuracy multichannel voltage supervisor is designed for systems that operate on low-voltage supply rails and have narrow margin supply tolerances.

Remote sense pins enable a highly accurate voltage measurement on the high current core rail by accounting for voltage drop across PCB traces. I2C functionality gives flexibility in selecting thresholds, reset delays, glitch filters, and pin functionality. The internal glitch immunity and noise filters eliminate the need for external RC components to reduce false resets resulting from power transients. In addition, device does not require any external resistors for setting overvoltage and undervoltage reset thresholds, which further optimizes overall accuracy, cost, size, and improves reliability for safety systems.

This device offers CRC error checking, sequence logging during turn ON or turn OFF, and a built-in ADC for voltage readouts to provide redundant error checking. In addition, TPS389006 offers a sync feature for tagging the rails as the device powers up. The TPS389006 device also pairs with TI's power-supply sequencer TPS38700 to enable proper power-on sequence in addition to voltage monitoring for SIL-3 level compliance.

Device Information
PART NUMBERPACKAGE (1)BODY SIZE (NOM) (2)
TPS389006-Q1WQFN (16)3mm x 3mm
TPS389008-Q1 Preview
TPS389R0-Q1 Preview
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TPS389006-Q1 TPS389R0-Q1 TPS389006-Q1 Typical Circuit TPS389006-Q1 Typical Circuit