SNVSBM4D
March 2022 – October 2024
TPS389006-Q1
,
TPS389R0-Q1
PRODMIX
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
I2C
7.3.2
Auto Mask (AMSK)
7.3.3
Packet Error Checking (PEC)
7.3.4
VDD
7.3.5
MON
7.3.6
NIRQ
7.3.7
ADC
7.3.8
Time Stamp
7.3.9
NRST
7.3.10
Register Protection
7.4
Device Functional Modes
7.4.1
Built-In Self Test and Configuration Load
7.4.1.1
Notes on BIST Execution
7.4.2
TPS389006/08-Q1,TPS389R0-Q1 Power ON
7.4.3
General Monitoring
7.4.3.1
IDLE Monitoring
7.4.3.2
ACTIVE Monitoring
7.4.3.3
Sequence Monitoring 1
7.4.3.3.1
ACT Transitions 0→1
7.4.3.3.2
SLEEP Transition 1→0
7.4.3.3.3
SLEEP Transition 0→1
7.4.3.4
Sequence Monitoring 2
7.4.3.4.1
ACT Transition 1→0
7.5
Register Maps
7.5.1
BANK0 Registers
7.5.2
BANK1 Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Multichannel Sequencer and Monitor
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.4
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power Supply Guidelines
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Nomenclature
9.2
Documentation Support
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND630A
Orderable Information
snvsbm4d_oa
snvsbm4d_pm
1
Features
ASIL-D Functional Safety-Compliant
Development target for Functional Safety applications
Documentation to aid ISO 26262 system design
Systematic capability up to ASIL D
Hardware capability up to ASIL D
AEC-Q100 qualified with the following results:
Device temperature grade 1: –40°C to +125°C
Monitor state-of-the art SOCs
±6mV threshold accuracy (–40°C to +125°C)
Input voltage range: 2.5V to 5.5V
Undervoltage lockout (UVLO): 2.48V
Low standby quiescent current: 200µA
6 channels with 2 remote sense (TPS389006-Q1)
6 channels with 2 remote sense and Reset output (TPS389R06-Q1)
8 channels (TPS389008-Q1)
Fixed window threshold levels
5mV steps from 0.2V to 1.475V
20mV steps from 0.8V to 5.5V
Miniature solution and minimal component cost
3mm x 3mm QFN package
Adjustable glitch immunity via I
2
C
User adjustable voltage threshold levels via I
2
C
Designed for safety applications
Active-low open-drain NIRQ output
Active-low open-drain NRST output (TPS389R0-Q1)
Built-in 8-bit ADC for real-time voltage readouts
Cyclic Redundancy Checking (CRC)
Packet Error Checking (PEC)
Sequence and fault logging
Sync function for rail tagging
Connect with a
multichannel sequencer
for sequencing functionality