SNVSC50
june 2023
TPS389006
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
I2C
8.3.2
Auto Mask (AMSK)
8.3.3
PEC
8.3.4
VDD
8.3.5
MON
8.3.6
NIRQ
8.3.7
ADC
8.3.8
Time Stamp
8.4
Device Functional Modes
8.4.1
Built-In Self Test and Configuration Load
8.4.1.1
Notes on BIST Execution
8.4.2
TPS389006 Power ON
8.4.3
General Monitoring
8.4.3.1
IDLE Monitoring
8.4.3.2
ACTIVE Monitoring
8.4.3.3
Sequence Monitoring 1
8.4.3.3.1
ACT Transitions 0→1
8.4.3.3.2
SLEEP Transition 1→0
8.4.3.3.3
SLEEP Transition 0→1
8.4.3.4
Sequence Monitoring 2
8.4.3.4.1
ACT Transition 1→0
8.5
Register Maps
8.5.1
BANK0 Registers
8.5.2
BANK1 Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Multichannel Sequencer and Monitor
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.4
Application Curves
10
Power Supply Recommendations
10.1
Power Supply Guidelines
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Nomenclature
12.2
Documentation Support
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND525B
Orderable Information
snvsc50_oa
snvsc50_pm
1
Features
Functional Safety-Compliant
Development target for Functional Safety applications
Documentation to aid IEC 61508 system design
Systematic capability up to SIL 3
Hardware capability up to SIL 3
Monitor state-of-the art SOCs
±6 mV threshold accuracy (–40°C to +125°C)
Input voltage range: 2.5 V to 5.5 V
Undervoltage lockout (UVLO): 2.48 V
Low standby quiescent current: 200 µA
6 channels with 2 remote sense
Fixed window threshold levels
5 mV steps from 0.2 V to 1.475 V
20 mV steps from 0.8 V to 5.5 V
Miniature solution and minimal component cost
3 mm x 3 mm QFN package
Adjustable glitch immunity via I
2
C
User adjustable voltage threshold levels via I
2
C
Designed for safety applications
Active-low open-drain NIRQ output
Built-in 8-bit ADC for real-time voltage readouts
Cyclic Redundancy Checking (CRC)
Packet Error Checking (PEC)
Sequence and fault logging
Sync function for rail tagging
Connect with a
multichannel sequencer
for sequencing functionality