SNVSCC2F November   2022  – July 2024 TPS389C03-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  I2C
      2. 7.3.2  Maskable Interrupt (AMSK)
      3. 7.3.3  VDD
      4. 7.3.4  MON
      5. 7.3.5  NRST
      6. 7.3.6  NIRQ
      7. 7.3.7  ADC
      8. 7.3.8  Packet Error Checking (PEC)
      9. 7.3.9  Q&A Watchdog
        1. 7.3.9.1 Question and Token Generation
        2. 7.3.9.2 Q&A Watchdog Open and Close Window Delay
        3. 7.3.9.3 Q&A Watchdog Status Register
        4. 7.3.9.4 Q&A Watchdog Timing
        5. 7.3.9.5 Q&A Watchdog State Machine and Test Program
      10. 7.3.10 Error Signal Monitoring (ESM)
        1. 7.3.10.1 ESM Timing
      11. 7.3.11 Register Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Built-In Self Test and Configuration Load
        1. 7.4.1.1 Notes on BIST Execution
      2. 7.4.2 TPS389C03-Q1 Power ON
  9. 8 Register Maps
    1. 8.1 Registers Overview
      1. 8.1.1 BANK0 Registers
      2. 8.1.2 BANK1 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Supply Guidelines
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Documentation Support
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.4 Application Curves

TPS389C03-Q1 NIRQ Triggered After an Overvoltage Fault Figure 9-2 NIRQ Triggered After an Overvoltage Fault
TPS389C03-Q1 NIRQ Triggered After an Undervoltage Fault Figure 9-3 NIRQ Triggered After an Undervoltage Fault
TPS389C03-Q1 NIRQ Not Triggered on Overvoltage Fault with 51.2 us OV Debounce Filter Figure 9-4 NIRQ Not Triggered on Overvoltage Fault with 51.2 us OV Debounce Filter
TPS389C03-Q1 NIRQ Triggered on Undervoltage Fault with 12.8 us UV Debounce Filter Figure 9-5 NIRQ Triggered on Undervoltage Fault with 12.8 us UV Debounce Filter
TPS389C03-Q1 NIRQ Not Triggered on Undervoltage Fault with 25 us UV Debounce Filter Figure 9-6 NIRQ Not Triggered on Undervoltage Fault with 25 us UV Debounce Filter
TPS389C03-Q1 NIRQ Triggered on Overvoltage Fault with 25 us OV Debounce Filter Figure 9-7 NIRQ Triggered on Overvoltage Fault with 25 us OV Debounce Filter
TPS389C03-Q1 NIRQ Propogation Delay Resulting from Overvoltage Fault Figure 9-8 NIRQ Propogation Delay Resulting from Overvoltage Fault
TPS389C03-Q1 NIRQ Propogation Delay Resulting from Undervoltage Fault Figure 9-9 NIRQ Propogation Delay Resulting from Undervoltage Fault
TPS389C03-Q1 1kHz Low Pass Filter Setting. NIRQ Triggered at 1.8kHz Signal with a 0.8V DC Component and 200mVp-p AC Signal. OV and UV Thresholds Set to 0.9V and 0.7V. Reduced the Frequency From 2kHz Until the NIRQ Pin Went Low. Figure 9-10 1kHz Low Pass Filter Setting. NIRQ Triggered at 1.8kHz Signal with a 0.8V DC Component and 200mVp-p AC Signal. OV and UV Thresholds Set to 0.9V and 0.7V. Reduced the Frequency From 2kHz Until the NIRQ Pin Went Low.
TPS389C03-Q1 250Hz Low Pass Filter setting. NIRQ Triggered at 455Hz Signal With a 0.8V DC Component and 200mVp-p AC Signal. OV and UV Thresholds Set to 0.9V and 0.7V. Reduced the Frequency From 500Hz Until the NIRQ Pin Went Low. Figure 9-11 250Hz Low Pass Filter setting. NIRQ Triggered at 455Hz Signal With a 0.8V DC Component and 200mVp-p AC Signal. OV and UV Thresholds Set to 0.9V and 0.7V. Reduced the Frequency From 500Hz Until the NIRQ Pin Went Low.
TPS389C03-Q1 500Hz Low Pass Filter Setting. NIRQ Triggered at 0.9kHz Signal With a 0.8V DC Component and 200mVp-p AC Signal. OV and UV Thresholds Set to 0.9V and 0.7V. Reduced the Frequency From 1kHz Until the NIRQ Pin Went Low. Figure 9-12 500Hz Low Pass Filter Setting. NIRQ Triggered at 0.9kHz Signal With a 0.8V DC Component and 200mVp-p AC Signal. OV and UV Thresholds Set to 0.9V and 0.7V. Reduced the Frequency From 1kHz Until the NIRQ Pin Went Low.