The Question and Answer Watchdog requires specific data to be sent from the MCU to the TPS389C03-Q1 within a specific time interval.

The TPS389C03-Q1 generates questions for the MCU to read during the OPEN and CLOSE windows. Questions are read as the combination of ANSW_CNT[1:0] and TOKEN[3:0] status bits found in the WD_STAT_QA register in BANK0. After reading a question, the MCU calculates the Reference Answer using the logic equations shown in Figure 7-10 and responds by writing the 8-bit answer into the WDT_ANSWER register in BANK1. A code example for Reference Answer calculation is shown in Figure 7-13. For a typical application, changing the value of FDBK[1:0], found in the WDT_QA_CFG register in BANK1, from the default value of FDBK[1:0] = 00b is not required. However, FDBK[1:0] can be changed if a different Reference Answer calculation is needed. Question generation and answer calculations are explained in more detail in Section 7.3.9.1.

Figure 7-10 Watchdog Answer Calculation for FDBK[1:0] = 00b

During one “event,” the TPS389C03-Q1 generates three questions within the CLOSE window and one question within the OPEN window. The MCU must correctly read and answer all three questions within the specified CLOSE window and the question within the specified OPEN window for a “good event” to occur. At the start of an event, ANSW_CNT[1:0] = 11b. A correctly answered question decrements ANSW_CNT[1:0] to generate the next question. Once a good event occurs, ANSW_CNT[1:0] is reset to ANSW_CNT[1:0] = 11b, and the value of TOKEN[3:0] changes to generate a new set of questions for the next event.

An incorrectly answered question increments the violation count, resets the ANSW_CNT[1:0] to ANSW_CNT[1:0] = 11b, and restarts the CLOSE window. The maxmimum violation count, MAX_VIOLATION_COUNT[2:0], is programmed using the WDT_CFG register in BANK1. When the violation count reaches its maximum value, the TPS389C03-Q1 WDO (latched) low, and may assert NIRQ and NRST low depending on the fault mapping. Note if NIRQ is un-mapped from watchdog fault reporting while NIRQ is asserted then NIRQ will deassert, NIRQ will reassert when re-mapped assuming the fault has not been cleared. A good event decrements the violation count if the violation count is not already equal to zero. When the watchdog enters the Idle state, the violation count is reset. When the the watchdog enters the suspend state, the violation count remains unchanged. The watchdog state diagram is illustrated in Figure 7-22.

Within an event, the CLOSE window time is a fixed value, and does not change if all three questions are answered faster than the set time. For example, if the CLOSE window time is set to 10ms, and the three questions are correctly answered in 5 ms, then the TPS389C03-Q1 will wait the remaining 5 ms before transitioning to the OPEN window. During the OPEN window, if the question is answered faster than the selected OPEN window time, then the TPS389C03-Q1 automatically transitions on to the next event's CLOSE window. An incorrectly answered question within either the CLOSE or OPEN windows results in the TPS389C03-Q1 restarting the CLOSE window.