SNVSBM4D March   2022  – October 2024 TPS389006-Q1 , TPS389R0-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  I2C
      2. 7.3.2  Auto Mask (AMSK)
      3. 7.3.3  Packet Error Checking (PEC)
      4. 7.3.4  VDD
      5. 7.3.5  MON
      6. 7.3.6  NIRQ
      7. 7.3.7  ADC
      8. 7.3.8  Time Stamp
      9. 7.3.9  NRST
      10. 7.3.10 Register Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Built-In Self Test and Configuration Load
        1. 7.4.1.1 Notes on BIST Execution
      2. 7.4.2 TPS389006/08-Q1,TPS389R0-Q1 Power ON
      3. 7.4.3 General Monitoring
        1. 7.4.3.1 IDLE Monitoring
        2. 7.4.3.2 ACTIVE Monitoring
        3. 7.4.3.3 Sequence Monitoring 1
          1. 7.4.3.3.1 ACT Transitions 0→1
          2. 7.4.3.3.2 SLEEP Transition 1→0
          3. 7.4.3.3.3 SLEEP Transition 0→1
        4. 7.4.3.4 Sequence Monitoring 2
          1. 7.4.3.4.1 ACT Transition 1→0
    5. 7.5 Register Maps
      1. 7.5.1 BANK0 Registers
      2. 7.5.2 BANK1 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Multichannel Sequencer and Monitor
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Guidelines
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Documentation Support
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.3.3 Sequence Monitoring 1

In addition to voltage monitoring, voltage rails sequences are also monitored on ACT and SLEEP changes, or on setting SEQ_REC_CTL.REC_START=1.

Sequence Monitoring 1 is a transitional state entered when:

  1. ACT transitions 0→1
  2. SLEEP transitions 0→1, if ACT=1
  3. SLEEP transitions 1→0, if ACT=1
  4. Host sets SEQ_REC_CTL.REC_START=1

The first three transitions trigger the same set of actions, with the TPS389006/08-Q1,TPS389R0-Q1 always ending in the ACTIVE state. However, the registers used to log and check the sequencing information are different.

The fourth method to start sequence monitoring (register bit set by the host) gives the flexibility to the host to decide when and where to track a sequence while the external signals are static. This is useful, for example, when software shutdown is initiated using FORCE_SHUTDOWN[1:0].

The following sections describe the actions for the first three cases explicitly for clarity.