SLUS970C
March 2011 – November 2023
TPS40170
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
Handling Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
LDO Linear Regulators and Enable
6.3.2
Input Undervoltage Lockout (UVLO)
6.3.2.1
Equations for Programming the Input UVLO:
6.3.3
Oscillator and Voltage Feed-Forward
6.3.3.1
Calculating the Timing Resistance (RRT)
6.3.4
Overcurrent Protection and Short-Circuit Protection (OCP and SCP)
6.3.5
Soft-Start and Fault-Logic
6.3.5.1
Soft Start During Overcurrent Fault
6.3.5.2
Equations for Soft Start and Restart Time
6.3.6
Overtemperature Fault
6.3.7
Tracking
6.3.8
Adaptive Drivers
6.3.9
Start-Up into Pre-Biased Output
6.3.10
Power Good (PGOOD)
6.3.11
PGND and AGND
6.4
Device Functional Modes
6.4.1
Frequency Synchronization
6.4.2
Operation Near Minimum VIN (VVIN ≤ 4.5 V)
7
Application and Implementation
7.1
Application Information
7.1.1
Bootstrap Resistor
7.1.2
SW Node Snubber Capacitor
7.1.3
Input Resistor
7.1.4
LDRV Gate Capacitor
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Custom Design with WEBENCH® Tools
7.2.2.2
List of Materials
7.2.2.3
Select a Switching Frequency
7.2.2.4
Inductor Selection (L1)
7.2.2.5
Output Capacitor Selection (C9)
7.2.2.6
Peak Current Rating of Inductor
7.2.2.7
Input Capacitor Selection (C1, C6)
7.2.2.8
MOSFET Switch Selection (Q1, Q2)
7.2.2.9
Timing Resistor (R7)
7.2.2.10
UVLO Programming Resistors (R2, R6)
7.2.2.11
Boot-Strap Capacitor (C7)
7.2.2.12
VIN Bypass Capacitor (C18)
7.2.2.13
VBP Bypass Capacitor (C19)
7.2.2.14
VDD Bypass Capacitor (C16)
7.2.2.15
SS Timing Capacitor (C15)
7.2.2.16
ILIM Resistor (R9, C17)
7.2.2.17
SCP Multiplier Selection (R5)
7.2.2.18
Feedback Divider (R10, R11)
7.2.2.19
Compensation: (R4, R13, C13, C14, C21)
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Third-Party Products Disclaimer
8.1.2
Development Support
8.1.2.1
Custom Design with WEBENCH® Tools
8.1.3
Related Devices
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGY|20
MPQF116H
Thermal pad, mechanical data (Package|Pins)
RGY|20
QFND041R
Orderable Information
slus970c_oa
slus970c_pm
1
Features
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100-V synchronous buck DC/DC controller with wide duty-cycle range
Wide input voltage range from 4.5 V to 60 V
Reference voltage of 600 mV with 1% accuracy
Programmable UVLO and hysteresis
Voltage mode control with voltage feed forward
Programmable frequency between 100 kHz and 600 kHz
Bi-directional -frequency synchronization with primary and secondary option
Low-side FET sensing overcurrent protection and high-side FET sensing short-circuit protection with integrated thermal compensation
Programmable closed loop soft-start
Supports pre-biased outputs
Thermal shutdown at 165°C with hysteresis
Voltage tracking
Power good
ENABLE with 1-µA low current shutdown
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Integrated Bootstrap Diode
20-Pin 3.5 mm × 4.5 mm VQFN (RGY) package
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