SLUS658D July   2005  – June 2019 TPS40190

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Dissipation Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internally Fixed Parameters
      2. 7.3.2 Output Short Circuit Protection
      3. 7.3.3 Enable Functionality
      4. 7.3.4 5-V Regulator
      5. 7.3.5 Startup Sequence and Timing
      6. 7.3.6 Prebias Outputs
  8. 8 Application and Implementation
    1. 8.1 Typical Applications
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Community Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.4 5-V Regulator

The TPS40190 has an on board 5-V regulator that allows the part to operate from a single voltage feed. No separate 5-V feed to the part is required. This regulator needs to have 4.7-μF of capacitance on the BP5 pin for stability. A ceramic capacitor is suggested for this purpose.

This regulator can also be used to supply power to nearby circuitry, eliminating the need for a separate LDO in some cases. If this pin is used for external loads, keep in mind that this is the power supply for the internals of the TPS40190. While efforts have been made to reduce sensitivity, any noise induced on this line has an adverse effect on the overall performance of the internal circuitry and shows up as increased pulse jitter, or skewed reference voltage. This regulator is turned off when the ENABLE pin is pulled low.

The amount of power available from this pin varies with the size of the power MOSFETs that the drivers must operate. Larger MOSFETs require more gate drive current and reduces the amount of power available on this pin for other tasks.

The total amount of current required by the gate drive and the external circuitry should not exceed 40 mA. The current required to drive the FET gates can be found from Equation 3.

Equation 3. TPS40190 q_ig_lus658.gif

where

  • IG is the required gate drive current
  • fSW is the switching frequency (300 kHz)
  • QG(high) is the gate charge requirement for the high-side FET at 5 V VGS
  • QG(low) is the gate charge requirement for the low-side FET at 5 V VGS