SLUSBO6C JANUARY 2014 – October 2018 TPS40425
PRODUCTION DATA.
Format | Unsigned binary | ||||
Description | This paged register is used for setting user selectable AVS reference DAC default state for each channel. When the dc-dc converter power supply system starts up in AVS mode, this 10-bit DAC default determines the initial output voltage level before any AVS command is issued by the host ASIC. The LSB is 2 mV.
This command can only be written in the non-AVS mode or AVS_STARTUP mode. In AVS mode, reads of this command are allowed, however - any writes to this register (including from EEPROM during RESTORE_USER_ALL) are prevented. An attempt to write to this register (not including RESTORE_USER_ALL) results in an ACK’d command, but the event results in the “oth” bit in STATUS_CML to be set and SMBALERT to be declared. |
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Default | 01F4h
The default power-up state can be changed using the STORE_USER commands. |
PAGE0, PAGE1 | |||||||||||||||
r | r | r | r | r | r | r/wE | r/wE | r/wE | r/wE | r/wE | r/wE | r/wE | r/wE | r/wE | r/wE |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
— | — | — | — | — | — | AVS_DAC_DEFAULT<9:0> |
Bits | Field Name | Description |
---|---|---|
7:2 | Note: Any values written to read-only registers are ignored. | |
1:0
7:0 |
AVS_DAC_DEFAULT | (Format: binary)
Default: 0000 0001 1111 0100 b (500 decimal → 1 V) Maximum: 0000 0010 1110 1110 b (750 decimal → 1.5 V) Minimum: 0000 0000 1111 1010 b (250 decimal → 0.5 V) An attempt to write beyond the set of limits set by the commands (AVS_CLAMP_HI, AVS_CLAMP_LO) is treated as invalid data – in effect, the ’cml’ bit in the STATUS_BYTE register and the ‘ivd’ bit in the STATUS_CML register are set, and SMB_ALERT asserted. |