SLUSEW1 January   2024 TPS4810-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge Pump and Gate Driver Output (VS, G1PU, G1PD, G2, BST, SRC)
      2. 7.3.2 Capacitive Load Driving Using FET Gate (G1PU, G1PD) Slew Rate Control
      3. 7.3.3 Short-Circuit Protection
        1. 7.3.3.1 Short-Circuit Protection With Auto-Retry
        2. 7.3.3.2 Short-Circuit Protection With Latch-Off
      4. 7.3.4 Undervoltage Protection (UVLO)
      5. 7.3.5 Reverse Polarity Protection
      6. 7.3.6 Short-Circuit Protection Diagnosis (SCP_TEST)
      7. 7.3.7 TPS48100-Q1 as a Simple Gate Driver
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Application Limitations
        1. 8.1.1.1 Short-Circuit Protection Delay
        2. 8.1.1.2 Short-Circuit Protection Threshold
    2. 8.2 Typical Application: Circuit Breaker in Battery Management System (BMS) using Low Side Current Sense
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

Selection of Current Sense Resistor, RSNS

The recommended range of the overcurrent protection threshold voltage, V(SCP), extends from 30mV to 300mV. Values near the low threshold of 30mV can be affected by the system noise. Values near the upper threshold of 300mV can cause high power dissipation in the current sense resistor. To minimize both the concerns, 40mV is selected as the short-circuit protection threshold voltage. Use the following equation to calculate the current sense resistor, RSNS.

Equation 10. RSNS = V(SCP)ISC

The next smaller available sense resistor 1mΩ, 1% is chosen.

To improve signal to noise ratio or for better short-circuit protection accuracy, higher short-circuit protection threshold voltage, V(SCP) can be selected.

Programming the Short-Circuit Protection Threshold – RISCP Selection

The RISCP sets the short-circuit protection threshold. Use the following equation to calculate the value.

Equation 11. RISCP (Ω)= ISC×RSNS - 10 mV2 μA

To set 30A as short-circuit protection threshold, RISCP value is calculated to be 15kΩ.

Choose the closest available standard value: 15kΩ, 1%.

Refer to Equation 9 in Section 8.1.1 for updated equation in final revision of IC.

In case where large di/dt is involved, the system and layout parasitic inductances can generate large differential signal voltages between CS+ and CS– pins. This action can trigger false short-circuit protection and nuisance trips in the system. To overcome such scenario, TI suggests to add placeholder for RC filter components across sense resistor (RSNS) and tweak the values during test in the real system. The RC filter components cannot be used in current sense designs by MOSFET VDS sensing to avoid impact on the short-circuit protection response.

Programming the Short-Circuit Protection Delay – CTMR Selection

For the design example under discussion, overcurrent transients are allowed for 1ms duration. This short-circuit protection delay, tSC can be set by selecting appropriate capacitor CTMR from TMR pin to ground. Use the following equation to calculate the value of CTMR to set 1ms for tSC.

Equation 12. CTMR=80 µ × tSC1.1 = 72.72 nF

Choose closest available standard value: 82nF, 10%.

Selection of MOSFETs, Q1 and Q2

For selecting the MOSFET Q1 and Q2 important electrical parameters are the maximum continuous drain current ID, the maximum drain-to-source voltage VDS(MAX), the maximum drain-to-source voltage VGS(MAX), and the drain-to-source ON-resistance RDSON.

The maximum continuous drain current, ID, rating must exceed the maximum continuous load current.

The maximum drain-to-source voltage, VDS(MAX), must be high enough to withstand the highest voltage seen in the application. Considering 60V as the maximum application voltage, MOSFETs with VDS voltage rating of 80V is designed for this application.

The maximum VGS TPS4810-Q1 can drive is 13V, so a MOSFET with 15V minimum VGS rating must be selected.

To reduce the MOSFET conduction losses, lowest possible RDS(ON) is preferred.

Based on the design requirements, IAUS200N08S5N023 is selected and the ratings are:

  • 80V VDS(MAX) and 20V VGS(MAX)
  • RDS(ON) is 2.3mΩ typical at 10V VGS
  • Maximum MOSFET Qg(total) is 110nC

Selection of Bootstrap Capacitor, CBST

The internal charge pump charges the external bootstrap capacitor (connected between BST and SRC pins) with approximately 345μA. Use the following equation to calculate the minimum required value of the bootstrap capacitor for driving two IAUS200N08S5N023 MOSFETs.

Equation 13. CBST = Qg(total)1 V = 220 nF

Choose closest available standard value: 220nF, 10%.

Setting the Undervoltage Lockout

The undervoltage lockout (UVLO) can be adjusted using an external voltage divider network of R1 and R2 connected between VS, EN/UVLO and GND pins of the device. The values required for setting the undervoltage and overvoltage are calculated by solving Equation 14.

Equation 14. GUID-20220628-SS0I-53ZT-CW1Z-HPJQGHHL40NK-low.svg

For minimizing the input current drawn from the power supply, TI recommends to use higher values of resistance for R1 and R2. However, leakage currents due to external active components connected to the resistor string can add error to these calculations. So, the resistor string current, I(R12) must be chosen to be 20 times greater than the leakage current of UVLO pin.

From the device electrical specifications, V(UVLOR) = 1.24V. From the design requirements, VINUVLO is 6.5V. To solve the equation, first choose the value of R1 = 470kΩ and use Equation 14 to solve for R2 = 24.9kΩ. Choose the closest standard 1% resistor values: R1 = 470kΩ, and R2 = 24.9kΩ.