SLUSEE5D January 2022 – April 2024 TPS4811-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
By following similar design procedure as outlined in Detailed Design Procedure, the external component values are calculated as below:
RSNS = 500 μΩ
RSET = 100 Ω
RIWRN = 47 kΩ to set 50 A as overcurrent protection threshold
RISCP = 1.4 kΩ to set 60 A as short-circuit protection threshold
CTMR = 68 nF to set 1 ms circuit breaker time
R1 and R2 are selected as 470 kΩ and 24.9 kΩ respectively to set VIN undervoltage lockout threshold at 24 V
RIMON = 15 kΩ to limit maximum V(IMON) voltage to 3.3 V at full-load current of 50 A
To reduce conduction losses, IAUS300N08S5N012 MOSFET is selected. Two FETs are used in parallel for control and another two FETs are used in parallel for reverse current blocking
80-V VDS(MAX) and ±20-V VGS(MAX)
RDS(ON) is 1-mΩ typical at 10-V VGS
Qg of each MOSFET is 231 nC
CBST = (4 × Qg) / 1 V = 1 μF
Selection of Pre-Charge Resistor
The value of pre-charge resistor must be selected to limit the inrush current to Iinrush as per Equation 23.
The power rating of the pre-charge resistor is decided by the average power dissipation given by Equation 24.
The peak power dissipation in the pre-charge resistor is given by Equation 25.
Two 220-Ω, 1.5-W, 5% CRCW2512220RJNEGHP resistors are used in parallel to support both average and peak power dissipation.
TI suggests the designer to share the entire power dissipation profile of pre-charge resistor with the resistor manufacturer and get their recommendation.