SLVSH18 December   2024 TPS4HC120-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     6
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 SNS Timing Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Pin Current and Voltage Conventions
      2. 6.3.2 Low Power Mode
      3. 6.3.3 Accurate Current Sense
      4. 6.3.4 Adjustable Current Limit
      5. 6.3.5 Inductive-Load Switching-Off Clamp
      6. 6.3.6 Fault Detection and Reporting
        1. 6.3.6.1 Diagnostic Enable Function
        2. 6.3.6.2 Multiplexing of Current Sense
        3. 6.3.6.3 FAULT Reporting
        4. 6.3.6.4 Fault Table
      7. 6.3.7 Full Diagnostics
        1. 6.3.7.1 Short-to-GND and Overload Detection
        2. 6.3.7.2 Open-Load Detection
          1. 6.3.7.2.1 Channel On
          2. 6.3.7.2.2 Channel Off
        3. 6.3.7.3 Short-to-Battery Detection
        4. 6.3.7.4 Reverse-Polarity and Battery Protection
        5. 6.3.7.5 Thermal Fault Detection
          1. 6.3.7.5.1 Thermal Protection Behavior
      8. 6.3.8 Full Protections
        1. 6.3.8.1 UVLO Protection
        2. 6.3.8.2 Loss of GND Protection
        3. 6.3.8.3 Loss of Power Supply Protection
        4. 6.3.8.4 Reverse Polarity Protection
        5. 6.3.8.5 Protection for MCU I/Os
    4. 6.4 Device Functional Modes
      1. 6.4.1 Working Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 EMC Transient Disturbances Test
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
        1. 7.5.2.1 Without a GND Network
        2. 7.5.2.2 With a GND Network
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5.1 Layout Guidelines

To prevent thermal shutdown, TJ must be less than 150°C. The HTSSOP package has good thermal impedance. However, the PCB layout is very important. Good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device.

  • Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when there are not any heat sinks attached to the PCB on the other side of the package.
  • Add as many thermal vias as possible directly under the package ground pad to optimize the thermal conductivity of the board.
  • All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.