SLVSH18 December   2024 TPS4HC120-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     6
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 SNS Timing Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Pin Current and Voltage Conventions
      2. 6.3.2 Low Power Mode
      3. 6.3.3 Accurate Current Sense
      4. 6.3.4 Adjustable Current Limit
      5. 6.3.5 Inductive-Load Switching-Off Clamp
      6. 6.3.6 Fault Detection and Reporting
        1. 6.3.6.1 Diagnostic Enable Function
        2. 6.3.6.2 Multiplexing of Current Sense
        3. 6.3.6.3 FAULT Reporting
        4. 6.3.6.4 Fault Table
      7. 6.3.7 Full Diagnostics
        1. 6.3.7.1 Short-to-GND and Overload Detection
        2. 6.3.7.2 Open-Load Detection
          1. 6.3.7.2.1 Channel On
          2. 6.3.7.2.2 Channel Off
        3. 6.3.7.3 Short-to-Battery Detection
        4. 6.3.7.4 Reverse-Polarity and Battery Protection
        5. 6.3.7.5 Thermal Fault Detection
          1. 6.3.7.5.1 Thermal Protection Behavior
      8. 6.3.8 Full Protections
        1. 6.3.8.1 UVLO Protection
        2. 6.3.8.2 Loss of GND Protection
        3. 6.3.8.3 Loss of Power Supply Protection
        4. 6.3.8.4 Reverse Polarity Protection
        5. 6.3.8.5 Protection for MCU I/Os
    4. 6.4 Device Functional Modes
      1. 6.4.1 Working Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 EMC Transient Disturbances Test
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
        1. 7.5.2.1 Without a GND Network
        2. 7.5.2.2 With a GND Network
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.6.2 Multiplexing of Current Sense

SELx pins are used to multiplex the shared current-sense function among the four channels within the same device. Pulling each pin high or low sets the corresponding channel to be output on the SNS pin if DIAG_EN is high. FLT still represents a global interrupt that goes low if a fault occurs on any channel.

If current sense information needs to be multiplexed across different devices, then it is not recommended to directly tie the SNS pins together across multiple devices. When the DIAG_EN is LOW, there is an internal clamp at SNS pin that clamps the voltage to approximately 2V. One device SNS pin might affect the other devices SNS readback if tied directly.

To use SNS pin across multiple devices, it is recommended to connect individual SNS pin to different analog input pins of MCU, as illustrated in Figure 6-13. Alternatively, an external analog MUX can be used to connect to a single MCU pin, as illustrated in Figure 6-14.

TPS4HC120-Q1 SNS Sharing Across Multiple Devices Method 1 Figure 6-13 SNS Sharing Across Multiple Devices Method 1
TPS4HC120-Q1 SNS Sharing Across Multiple Devices Method 2 Figure 6-14 SNS Sharing Across Multiple Devices Method 2
Table 6-2 Diagnosis Configuration Table
DIAG_EN ENx SEL0 SEL1 SNS ACTIVATED CHANNEL SNS FLT PROTECTIONS AND DIAGNOSTICS
L H — — — 0V. Clamp to 2V internally if external voltage is applied to the pin. See Table 6-3 SNS disabled, FLT reporting, full protection
L High-Z Diagnostics disabled, no protection
H — 0 0 Channel 1 See Table 6-3 See Table 6-3 See Table 6-3
0 1 Channel 2
1 0 Channel 3
1 1 Channel 4