SLUSAH1E MAY 2011 – July 2018 TPS51206
PRODUCTION DATA.
TPS51206 device is designed for a sink / source double date rate (DDR) termination regulator with VTTREF buffered reference output. Supply input voltage (VDD) supports 3.3-V rail and 5-V rail; VLDOIN input voltage supports VTT+0.4 V to 3.5 V.