SLUSFR0A July   2024  – August 2024 TPS51375

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  PWM Operation and D-CAP3™ Control Mode
      2. 6.3.2  Remote Sense
      3. 6.3.3  Body Braking
      4. 6.3.4  5V LDO and BYP Function
      5. 6.3.5  Soft Start
      6. 6.3.6  Large Duty Operation
      7. 6.3.7  Power Good
      8. 6.3.8  Overcurrent Protection and Undervoltage Protection
      9. 6.3.9  Overvoltage Protection
      10. 6.3.10 UVLO Protection
      11. 6.3.11 Output Voltage Discharge
      12. 6.3.12 Standby Operation
      13. 6.3.13 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Advanced Eco-mode Control
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 External Component Selection
          1. 7.2.2.2.1 Remote Sense Amplifier and Adjusting the Output Voltage
          2. 7.2.2.2.2 Inductor Selection
          3. 7.2.2.2.3 Output Capacitor Selection
          4. 7.2.2.2.4 Input Capacitor Selection
          5. 7.2.2.2.5 Bootstrap Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7.2.2.2.5 Bootstrap Capacitor Selection

A 0.1µF ceramic capacitor must be connected between the BST and SW pins for proper operation. The capacitor must be rated for at least 10V to minimize DC bias derating.

A resistor can be added in series with the BST capacitor to slow down the turn-on of the high-side MOSFET and reduce overshoot rising edge overshoot on the SW pin. This action comes with the tradeoff of more power loss and lower efficiency. As a best practice, include a 0Ω placeholder in prototype designs in case parasitic inductance in the PCB layout results in more voltage overshoot at the SW pin than is normal. This practice helps keep the voltage within the ratings of the device and reduces the high frequency noise on the SW node.