Make note that the PCB layout of
any DC/DC converter is critical to the excellent performance of the design. Bad
PCB layout can disrupt the operation of a good schematic design. Even if the
converter regulates correctly, bad PCB layout can mean the difference between a
robust design and one that cannot be mass produced. Furthermore, the EMI
performance of the converter is dependent on the PCB layout to a great extent.
In a buck converter, the most critical PCB feature is the loop formed by the
input capacitors and power ground. This loop carries large transient currents
that can cause large transient voltages when reacting with the trace inductance.
These unwanted transient voltages disrupt the proper operation of the converter.
Because of this fact, the traces in this loop must be wide and short, and the
loop area as small as possible to reduce the parasitic inductance.
Use a four-layer PCB for good thermal performance
and with maximum ground plane. 3-inch × 2.75-inch, top and bottom layer PCB with
2oz copper is used as example.
Place the decoupling capacitors right across VIN and VCC as close as possible.
Place output inductors and capacitors with IC at
the same layer. The SW routing must be as short as possible to minimize EMI, and
must be a width plane to carry big current. Enough vias must be added to the
PGND connection of output capacitors and also as close to the output pin as
possible.
Place BST resistor and capacitor with IC at the
same layer, close to BST and SW plane. TI recommends > 10-mil width trace to
reduce line parasitic inductance.
Make feedback 10 mil and routed away from the
switching node, BST node, or other high speed digital signal.
Make VIN trace wide to reduce the trace impedance
and provide enough current capability.
Place multiple vias under the device near VIN and PGND and near input capacitors
to reduce parasitic inductance and improve thermal performance.