SLUSAE1F December 2010 – December 2018 TPS51916
PRODUCTION DATA.
Figure 38 shows simplified model of D-CAP2™ architecture.
The D-CAP2™ mode in the TPS51916 device includes an internal feedback network enabling the use of very low ESR output capacitor(s) such as multi-layer ceramic capacitors. The role of the internal network is to sense the ripple component of the inductor current information and combine it with voltage feedback signal. Using RC1=RC2≡RC and CC1=CC2≡CC, 0-dB frequency of the D-CAP2™ mode is given by Equation 5. It is recommended that the 0-dB frequency (f0) be lower than 1/3 of the switching frequency to secure the proper phase margin
where
The typical G value is 0.25, and typical RCCC time constant values for 500 kHz and 670 kHz operation are 23 µs and 14.6 µs, respectively.
For example, when fSW=500 kHz and LX=1 µH, COUT should be larger than 88 µF.
When selecting the capacitor, pay attention to its characteristics. For MLCC use X5R or better dielectric and consider the derating of the capacitance by both DC bias and AC bias. When derating by DC bias and AC bias are 80% and 50%, respectively, the effective derating is 40% because 0.8 x 0.5 = 0.4. The capacitance of specialty polymer capacitors may change depending on the operating frequency. Consult capacitor manufacturers for specific characteristics.