SLUSAE1F December   2010  – December 2018 TPS51916

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VDDQ Switch Mode Power Supply Control
      2. 7.3.2  VREF and REFIN, VDDQ Output Voltage
      3. 7.3.3  Soft-Start and Powergood
      4. 7.3.4  Power State Control
      5. 7.3.5  Discharge Control
      6. 7.3.6  VTT and VTTREF
      7. 7.3.7  VDDQ Overvoltage and Undervoltage Protection
      8. 7.3.8  VDDQ Out-of-Bound Operation
      9. 7.3.9  VDDQ Overcurrent Protection
      10. 7.3.10 VTT Overcurrent Protection
      11. 7.3.11 V5IN Undervoltage Lockout Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin Configuration
      2. 7.4.2 D-CAP™ Mode
    5. 7.5 D-CAP2™ Mode Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 DDR3, D-CAP™ 400-kHz Application with Tracking Discharge
        1. 8.1.1.1 Design Requirements
        2. 8.1.1.2 Detailed Design Procedure
          1. 8.1.1.2.1 1. Determine the value of R1 AND R2
          2. 8.1.1.2.2 2. Choose the inductor
          3. 8.1.1.2.3 3. Choose the OCL setting resistance, RTRIP
          4. 8.1.1.2.4 Choose the output capacitors
        3. 8.1.1.3 Application Curves
      2. 8.1.2 DDR3, DCAP-2 500-kHz Application, with Tracking Discharge
        1. 8.1.2.1 Design Requirements
        2. 8.1.2.2 Detailed Design Procedure
          1. 8.1.2.2.1 Select Mode and Switching Frequency
          2. 8.1.2.2.2 Determine output capacitance
        3. 8.1.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 Discharge Control

In S4/S5 state, VDDQ, VTT, and VTTREF outputs are discharged based on the respective discharge mode selected above. The tracking discharge mode discharges VDDQ output through the internal VTT regulator transistors enabling quick discharge operation. The VTT output maintains tracking of the VTTREF voltage in this mode. (Please refer to Figure 29) After 4 ms of tracking discharge operation, the mode changes to non-tracking discharge. The VDDQ output must be connected to the VLDOIN pin in this mode. The non-tracking mode discharges the VDDQ and VTT pins using internal MOSFETs that are connected to corresponding output terminals. The non-tracking discharge is slow compared with the tracking discharge due to the lower current capability of these MOSFETs. (Please refer to Figure 30)