SLUSAE1F December   2010  – December 2018 TPS51916

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VDDQ Switch Mode Power Supply Control
      2. 7.3.2  VREF and REFIN, VDDQ Output Voltage
      3. 7.3.3  Soft-Start and Powergood
      4. 7.3.4  Power State Control
      5. 7.3.5  Discharge Control
      6. 7.3.6  VTT and VTTREF
      7. 7.3.7  VDDQ Overvoltage and Undervoltage Protection
      8. 7.3.8  VDDQ Out-of-Bound Operation
      9. 7.3.9  VDDQ Overcurrent Protection
      10. 7.3.10 VTT Overcurrent Protection
      11. 7.3.11 V5IN Undervoltage Lockout Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin Configuration
      2. 7.4.2 D-CAP™ Mode
    5. 7.5 D-CAP2™ Mode Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 DDR3, D-CAP™ 400-kHz Application with Tracking Discharge
        1. 8.1.1.1 Design Requirements
        2. 8.1.1.2 Detailed Design Procedure
          1. 8.1.1.2.1 1. Determine the value of R1 AND R2
          2. 8.1.1.2.2 2. Choose the inductor
          3. 8.1.1.2.3 3. Choose the OCL setting resistance, RTRIP
          4. 8.1.1.2.4 Choose the output capacitors
        3. 8.1.1.3 Application Curves
      2. 8.1.2 DDR3, DCAP-2 500-kHz Application, with Tracking Discharge
        1. 8.1.2.1 Design Requirements
        2. 8.1.2.2 Detailed Design Procedure
          1. 8.1.2.2.1 Select Mode and Switching Frequency
          2. 8.1.2.2.2 Determine output capacitance
        3. 8.1.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6 VTT and VTTREF

The TPS51916 device integrates two high-performance, low-drop-out linear regulators, VTT and VTTREF, to provide complete DDR2, DDR3, DDR3L, and DDR4 power solutions. The VTTREF has a 10-mA sink/source current capability, and tracks ½ of VDDQSNS with ±1% accuracy using an on-chip ½ divider. A 0.22-μF (or larger) ceramic capacitor must be connected close to the VTTREF terminal to ensure stable operation. The VTT responds quickly to track VTTREF within ±40 mV at all conditions, and the current capability is 2 A for both sink and source. A 10-μF (or larger) ceramic capacitor(s) need to be connected close to the VTT terminal for stable operation. To achieve tight regulation with minimum effect of wiring resistance, a remote sensing terminal, VTTSNS, should be connected to the positive node of VTT output capacitors as a separate trace from the high-current line to the VTT pin. (Refer to the Layout section for details.)

When VTT is not required in the design, following treatment is strongly recommended.

  • Connect VLDOIN to VDDQ.
  • Tie VTTSNS to VTT, and remove capacitors from VTT to float.
  • Connect VTTGND to GND.
  • Select MODE2, 3, 4 or 5 shown in Table 2 (Select Non-tracking discharge mode).
  • Maintain a 0.22-µF capacitor connected at VTTREF.
  • Pull down S3 to GND with 1-kΩ resistance.
TPS51916 typ_app_no_vtt.gifFigure 35. Application Circuit When VTT Is Not Required