SLUSDP0A August   2019  – May 2021 TPS53676

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 ESD Ratings
    4. 6.4 Electrical Specifications
      1. 6.4.1  Thermal Information
      2. 6.4.2  Supply
      3. 6.4.3  DAC and Voltage Feedback
      4. 6.4.4  Control Loop Parameters
      5. 6.4.5  Dynamic VID (DVID) Tuning
      6. 6.4.6  Undershoot Reduction (USR) and Overshoot Reduciton (OSR)
      7. 6.4.7  Dynamic Phase Shedding (DPS)
      8. 6.4.8  Turbo Mode and Thermal Balance Management (TBM)
      9. 6.4.9  Overcurrent Limit (OCL)
      10. 6.4.10 Telemetry
      11. 6.4.11 Phase-Locked Loop and Closed-Loop Frequency Control
      12. 6.4.12 Logic Interface
      13. 6.4.13 Current Sensing and Current Sharing
      14. 6.4.14 Pin Detection Thresholds
      15. 6.4.15 ADDR Pinstrap Decoding
      16. 6.4.16 BOOT_CHA Pinstrap Decoding
      17. 6.4.17 Timing Specifications
      18. 6.4.18 Faults and Converter Protection
      19. 6.4.19 PMBus/AVS Interfaces
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Power-up and initialization
      1. 7.3.1 First power-up
      2. 7.3.2 Boot voltage configuration (BOOT_CHA)
      3. 7.3.3 Power Sequencing
    4. 7.4 Pin connections and bevahior
      1. 7.4.1  Supplies: VCC and VREF
      2. 7.4.2  Differential remote sensing and output voltage scaling: AVSP/AVSN, BVSP/BVSN
      3. 7.4.3  Input current sensing: VIN_CSNIN and CSPIN
      4. 7.4.4  Pin-strap detection and PIN_DETECT_OVERRIDE
      5. 7.4.5  Enable and disable: AVR_EN and BVR_EN
      6. 7.4.6  System feedback: AVR_RDY and BVR_RDY
      7. 7.4.7  Catastrophic fault alert: VR_FAULT#
      8. 7.4.8  Output voltage reset: RESET#
      9. 7.4.9  Synchronization: SYNC
      10. 7.4.10 Smart power stage connections: PWM, CSP and TSEN
      11. 7.4.11 PMBus pins: SMB_DIO, SMB_CLK, and SMB_ALERT#
      12. 7.4.12 AVSBus: AVS_CLK, AVS_MDATA, AVS_SDATA, and AVS_VDDIO
    5. 7.5 Advanced power management functions
      1. 7.5.1 Adaptive voltage scaling or dynamic VID (DVID)
      2. 7.5.2 Output voltage margining
      3. 7.5.3 Power supply telemetry and calibration
        1. 7.5.3.1 Output current calibration
        2. 7.5.3.2 Input current calibration (measured)
        3. 7.5.3.3 Input current calibration (calculated)
      4. 7.5.4 Flexible phase assignment
      5. 7.5.5 Thermal balance management (TBM)
      6. 7.5.6 Dynamic phase adding/shedding (DPA/DPS)
    6. 7.6 Control Loop Theory of Operation
      1. 7.6.1 Adaptive voltage positioning and DC load line (droop)
      2. 7.6.2 DCAP+ conceptual overview
      3. 7.6.3 Off-time control: loop compensation and transient tuning
      4. 7.6.4 On-time control: adaptive ton and autobalance current sharing
      5. 7.6.5 Load transient response
      6. 7.6.6 Forced minimum on-time, minimum off-time and leading-edge blanking time
      7. 7.6.7 Nonlinear: undershoot reduction (USR), overshoot reduction (OSR) and dynamic integration
    7. 7.7 Power supply fault protection
      1. 7.7.1 Host notification and status reporting
      2. 7.7.2 Fault type and response definitions
      3. 7.7.3 Fault behavior summary
      4. 7.7.4 Detailed fault descriptions
        1. 7.7.4.1  Overvoltage fault (OVF) and warning (OVW)
        2. 7.7.4.2  Undervoltage fault (UVF) and warning (UVW)
        3. 7.7.4.3  Maximum turn-on time exceeded (TON_MAX)
        4. 7.7.4.4  Output commanded out-of-bounds (VOUT_MIN_MAX)
        5. 7.7.4.5  Overcurrent fault (OCF), warning (OCW), and per-phase overcurrent limit (OCL)
        6. 7.7.4.6  Current share warning (ISHARE)
        7. 7.7.4.7  Overtemperature fault protection (OTF) and warning (OTW)
        8. 7.7.4.8  Powerstage fault (TAO_HIGH) and powerstage not ready (TAO_LOW)
        9. 7.7.4.9  Input overvoltage fault (VIN_OVF) and warning (VIN_OVW)
        10. 7.7.4.10 Input undervoltage fault (VIN_UVF), warning (VIN_UVW) and turn-on voltage (VIN_ON)
        11. 7.7.4.11 Input overcurrent fault (IIN_OCF) and warning (IIN_OCW)
        12. 7.7.4.12 Input overpower warning (PIN_OPW)
        13. 7.7.4.13 PMBus command, memory and logic errors (CML)
    8. 7.8 Programming
      1. 7.8.1 PMBus Interface
        1. 7.8.1.1 PMBus transaction types
        2. 7.8.1.2 PMBus data formats
          1. 7.8.1.2.1 Example PMBus number format conversions
          2. 7.8.1.2.2 Example system code for PMBus format conversion
        3. 7.8.1.3 Raw non-volatile memory programming
        4.       93
        5. 7.8.1.4 PMBus Command Descriptions
          1. 7.8.1.4.1   (00h) PAGE
          2. 7.8.1.4.2   (01h) OPERATION
          3. 7.8.1.4.3   (02h) ON_OFF_CONFIG
          4. 7.8.1.4.4   (03h) CLEAR_FAULTS
          5. 7.8.1.4.5   (04h) PHASE
          6. 7.8.1.4.6   (05h) PAGE_PLUS_WRITE
          7. 7.8.1.4.7   (06h) PAGE_PLUS_READ
          8. 7.8.1.4.8   (10h) WRITE_PROTECT
          9. 7.8.1.4.9   (15h) STORE_USER_ALL
          10. 7.8.1.4.10  (16h) RESTORE_USER_ALL
          11. 7.8.1.4.11  (19h) CAPABILITY
          12. 7.8.1.4.12  (1Bh) SMBALERT_MASK_WORD
          13. 7.8.1.4.13  (1Bh) SMBALERT_MASK_VOUT
          14. 7.8.1.4.14  (1Bh) SMBALERT_MASK_IOUT
          15. 7.8.1.4.15  (1Bh) SMBALERT_MASK_INPUT
          16. 7.8.1.4.16  (1Bh) SMBALERT_MASK_TEMPERATURE
          17. 7.8.1.4.17  (1Bh) SMBALERT_MASK_CML
          18. 7.8.1.4.18  (1Bh) SMBALERT_MASK_MFR
          19. 7.8.1.4.19  (20h) VOUT_MODE
          20. 7.8.1.4.20  (21h) VOUT_COMMAND
          21. 7.8.1.4.21  (22h) VOUT_TRIM
          22. 7.8.1.4.22  (24h) VOUT_MAX
          23. 7.8.1.4.23  (25h) VOUT_MARGIN_HIGH
          24. 7.8.1.4.24  (26h) VOUT_MARGIN_LOW
          25. 7.8.1.4.25  (27h) VOUT_TRANSITION_RATE
          26. 7.8.1.4.26  (28h) VOUT_DROOP
          27. 7.8.1.4.27  (29h) VOUT_SCALE_LOOP
          28. 7.8.1.4.28  (2Bh) VOUT_MIN
          29. 7.8.1.4.29  (33h) FREQUENCY_SWITCH
          30. 7.8.1.4.30  (34h) POWER_MODE
          31. 7.8.1.4.31  (35h) VIN_ON
          32. 7.8.1.4.32  (38h) IOUT_CAL_GAIN
          33. 7.8.1.4.33  (39h) IOUT_CAL_OFFSET
          34. 7.8.1.4.34  (40h) VOUT_OV_FAULT_LIMIT
          35. 7.8.1.4.35  (41h) VOUT_OV_FAULT_RESPONSE
          36. 7.8.1.4.36  (42h) VOUT_OV_WARN_LIMIT
          37. 7.8.1.4.37  (43h) VOUT_UV_WARN_LIMIT
          38. 7.8.1.4.38  (44h) VOUT_UV_FAULT_LIMIT
          39. 7.8.1.4.39  (45h) VOUT_UV_FAULT_RESPONSE
          40. 7.8.1.4.40  (46h) IOUT_OC_FAULT_LIMIT
          41. 7.8.1.4.41  (47h) IOUT_OC_FAULT_RESPONSE
          42. 7.8.1.4.42  (4Ah) IOUT_OC_WARN_LIMIT
          43. 7.8.1.4.43  (4Fh) OT_FAULT_LIMIT
          44. 7.8.1.4.44  (50h) OT_FAULT_RESPONSE
          45. 7.8.1.4.45  (51h) OT_WARN_LIMIT
          46. 7.8.1.4.46  (55h) VIN_OV_FAULT_LIMIT
          47. 7.8.1.4.47  (56h) VIN_OV_FAULT_RESPONSE
          48. 7.8.1.4.48  (57h) VIN_OV_WARN_LIMIT
          49. 7.8.1.4.49  (58h) VIN_UV_WARN_LIMIT
          50. 7.8.1.4.50  (59h) VIN_UV_FAULT_LIMIT
          51. 7.8.1.4.51  (5Ah) VIN_UV_FAULT_RESPONSE
          52. 7.8.1.4.52  (5Bh) IIN_OC_FAULT_LIMIT
          53. 7.8.1.4.53  (5Ch) IIN_OC_FAULT_RESPONSE
          54. 7.8.1.4.54  (5Dh) IIN_OC_WARN_LIMIT
          55. 7.8.1.4.55  (60h) TON_DELAY
          56. 7.8.1.4.56  (61h) TON_RISE
          57. 7.8.1.4.57  (62h) TON_MAX_FAULT_LIMIT
          58. 7.8.1.4.58  (63h) TON_MAX_FAULT_RESPONSE
          59. 7.8.1.4.59  (64h) TOFF_DELAY
          60. 7.8.1.4.60  (65h) TOFF_FALL
          61. 7.8.1.4.61  (6Bh) PIN_OP_WARN_LIMIT
          62. 7.8.1.4.62  (78h) STATUS_BYTE
          63. 7.8.1.4.63  (79h) STATUS_WORD
          64. 7.8.1.4.64  (7Ah) STATUS_VOUT
          65. 7.8.1.4.65  (7Bh) STATUS_IOUT
          66. 7.8.1.4.66  (7Ch) STATUS_INPUT
          67. 7.8.1.4.67  (7Dh) STATUS_TEMPERATURE
          68. 7.8.1.4.68  (7Eh) STATUS_CML
          69. 7.8.1.4.69  (80h) STATUS_MFR_SPECIFIC
          70. 7.8.1.4.70  (88h) READ_VIN
          71. 7.8.1.4.71  (89h) READ_IIN
          72. 7.8.1.4.72  (8Bh) READ_VOUT
          73. 7.8.1.4.73  (8Ch) READ_IOUT
          74. 7.8.1.4.74  (8Dh) READ_TEMPERATURE_1
          75. 7.8.1.4.75  (96h) READ_POUT
          76. 7.8.1.4.76  (97h) READ_PIN
          77. 7.8.1.4.77  (98h) PMBUS_REVISION
          78. 7.8.1.4.78  (99h) MFR_ID
          79. 7.8.1.4.79  (9Ah) MFR_MODEL
          80. 7.8.1.4.80  (9Bh) MFR_REVISION
          81. 7.8.1.4.81  (9Dh) MFR_DATE
          82. 7.8.1.4.82  (ADh) IC_DEVICE_ID
          83. 7.8.1.4.83  (AEh) IC_DEVICE_REV
          84. 7.8.1.4.84  (B1h) USER_DATA_01 (COMPENSATION_CONFIG)
          85. 7.8.1.4.85  (B2h) USER_DATA_02 (NONLINEAR_CONFIG)
          86. 7.8.1.4.86  (B3h) USER_DATA_03 (PHASE_CONFIG)
          87. 7.8.1.4.87  (B4h) USER_DATA_04 (DVID_CONFIG)
          88. 7.8.1.4.88  (B7h) USER_DATA_07 (PHASE_SHED_CONFIG)
          89. 7.8.1.4.89  (B8h) USER_DATA_08 (AVSBUS_CONFIG)
          90. 7.8.1.4.90  (BAh) USER_DATA_10 (ISHARE_CONFIG)
          91. 7.8.1.4.91  (BBh) USER_DATA_11 (MFR_PROTECTION_CONFIG)
          92. 7.8.1.4.92  (BDh) USER_DATA_13 (MFR_CALIBRATION_CONFIG)
          93. 7.8.1.4.93  (CDh) MFR_SPECIFIC_CD (MULTIFUNCTION_PIN_CONFIG_1)
          94. 7.8.1.4.94  (CEh) MFR_SPECIFIC_CD (MULTIFUNCTION_PIN_CONFIG_2)
          95. 7.8.1.4.95  (CFh) SMBALERT_MASK_EXTENDED
          96. 7.8.1.4.96  (D1h) READ_VOUT_MIN_MAX
          97. 7.8.1.4.97  (D2h) READ_IOUT_MIN_MAX
          98. 7.8.1.4.98  (D3h) READ_TEMPERATURE_MIN_MAX)
          99. 7.8.1.4.99  (D4h) READ_MFR_VOUT
          100. 7.8.1.4.100 (D5h) READ_VIN_MIN_MAX
          101. 7.8.1.4.101 (D6h) READ_IIN_MIN_MAX
          102. 7.8.1.4.102 (D7h) READ_PIN_MIN_MAX
          103. 7.8.1.4.103 (D8h) READ_POUT_MIN_MAX
          104. 7.8.1.4.104 (DAh) READ_ALL
          105. 7.8.1.4.105 (DBh) STATUS_ALL
          106. 7.8.1.4.106 (DCh) STATUS_PHASES
          107. 7.8.1.4.107 (DDh) STATUS_EXTENDED
          108. 7.8.1.4.108 (E0h) AVSBUS_LOG
          109. 7.8.1.4.109 (E3h) MFR_SPECIFIC_E3 (VR_FAULT_CONFIG)
          110. 7.8.1.4.110 (E4h) SYNC_CONFIG
          111. 7.8.1.4.111 (EDh) MFR_SPECIFIC_ED (MISC_OPTIONS)
          112. 7.8.1.4.112 (EEh) MFR_SPECIFIC_EE (PIN_DETECT_OVERRIDE)
          113. 7.8.1.4.113 (EFh) MFR_SPECIFIC_EF (SLAVE_ADDRESS)
          114. 7.8.1.4.114 (F0h) MFR_SPECIFIC_F0 (NVM_CHECKSUM)
          115. 7.8.1.4.115 (F5h) MFR_SPECIFIC_F5 (USER_NVM_INDEX)
          116. 7.8.1.4.116 (F6h) MFR_SPECIFIC_F6 (USER_NVM_EXECUTE)
          117. 7.8.1.4.117 (FAh) NVM_LOCK
          118. 7.8.1.4.118 (FBh) MFR_SPECIFIC_WRITE_PROTECT
      2. 7.8.2 AVSBus Interface
        1. 7.8.2.1 AVSBus transaction types
        2. 7.8.2.2 Example AVSBus Frames
        3. 7.8.2.3 Example AVSBus number format conversions
        4. 7.8.2.4 AVSBus fault and warning behavior
        5. 7.8.2.5 AVSBus Command Descriptions
          1. 7.8.2.5.1 (0h) AVSBus Output Voltage
          2. 7.8.2.5.2 (1h) AVSBus Transition Rate
          3. 7.8.2.5.3 (2h) AVSBus Output Current
          4. 7.8.2.5.4 (3h) AVSBus Temperature
          5. 7.8.2.5.5 (4h) AVSBus Reset Voltage
          6. 7.8.2.5.6 (5h) AVSBus Power Mode
          7. 7.8.2.5.7 (Eh) AVSBus Status
          8. 7.8.2.5.8 (Fh) AVSBus Version
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Schematic
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Performance Plots
  9. 9 Power Supply Recommendations
  10. 10Layout
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6.6 Forced minimum on-time, minimum off-time and leading-edge blanking time

Under normal linear operation, the PWM on- and off-times are generated by the control loop. To improve noise immunity, the controller forces a minimum on-time whenever the PWM pins pulse high. The off-time for any phase is limited by a forced minimum off-time. Although TI smart power stage devices have built-in protection from glitches on the PWM pins also, this feature provides redundant protection against cross-conduction issues.

The controller also limits the time between sending pulses to any two adjacent phases. This is referred to as the leading-edge blanking time, tBLANK. Increase the leading edge blanking time to prevent over-compensation (or "ring-back") by the controller during heavy load transient events. The minimum on-time, minimum off-time, and leading edge blanking time are programmable by the NONLINEAR_CONFIG PMBus command. Refer to the Technical Reference Manual for a register map of this command.

For multiphase designs, the maximum per-phase switching frequency during transients, is limited by the leading edge blanking time parameters as shown in Equation 35. The controller also forces a minimum-off-time per phase. The greater of the two limits the maximum frequency.

Equation 35. f PHASE(max) = 1 N Φ × t BLANK

where

  • NΦ is the number of active phases
  • tBLANK is the leading edge blanking time in seconds