SLUSDP0A August 2019 – May 2021 TPS53676
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
References: DAC and VREF | ||||||
VMODE | Supported VOUT_MODE | VOUT_MODE = 16h | ULINEAR16, Absolute, N = -10 exponent |
- | ||
VDACRNG | VDAC range | No external divider. VOUT_MAX ≤ 1.87 V |
0.25 | 1.87 | V | |
No external divider VOUT_MAX > 1.87 V |
0.50 | 3.74 | V | |||
RDIV | External resistor for output voltage scaling with Vout > 3.74 V | VOUT to VSP resistor | 500 | Ω | ||
VSP to VSN resistor | 500 | Ω | ||||
VDAC | VSP accuracy | 0.25 ≤ VSP ≤ 1 V, ICORE = 0A | -5 | 5 | mV | |
1 V < VSP ≤ 1.87 V; ICORE = 0A | -0.5 | 0.5 | % | |||
1.87 V < VSP ≤ 5 V; ICORE = 0A | -1 | 1 | % | |||
VVREF | VREF output accuracy | VCC = 2.97 V to 3.6 V, IVREF = 0 | 1.493 | 1.5 | 1.507 | V |
VVREF(REG) | VREF load regulation (sourcing) | IVREF = 0A to 10 mA | -8 | mV | ||
VREF load regulaiton (sinking) | IVREF = -10 mA to 0A | 8 | mV | |||
VTRIM(RES) | Vout offset NVM resolution (1) | MFR_SPECIFIC_ED[13:12] = 00b | 0.9765 | mV | ||
MFR_SPECIFIC_ED[13:12] = 01b | 1.9531 | mV | ||||
MFR_SPECIFIC_ED[13:12] = 10b | 3.9063 | mV | ||||
MFR_SPECIFIC_ED[13:12] = 11b | 7.8125 | mV | ||||
VTRIM(RNG) | Vout offset NVM range (1) | VOUT_TRIM in SLINEAR16 format | -128 | 127 | LSB | |
Voltage Sense: AVSP/BVSP and AVSN/BVSN | ||||||
IAVSP | AVSP Input Bias Current | Not in Fault, Disable or UVLO; AVSP = VDAC = 1.8 V AVSN = 0 V |
50 | µA | ||
IAVSN | AVSN Input Bias Current | Not in Fault, Disable or UVLO; AVSP = VDAC = 1.8 V, AVSN = 0 V |
-55 | µA | ||
IBVSP | BVSP Input Bias Current | Not in Fault, Disable or UVLO; BVSP = VDAC = 1.8 V, BVSN = 0 V |
50 | µA | ||
IBVSN | BVSN Input Bias Current | Not in Fault, Disable or UVLO; BVSP = VDAC = 1.8 V, BVSN = 0 V |
-55 | µA |