SLUSEL8A
June 2021 – December 2021
TPS536C9
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device and Documentation Support
5.1
Getting Started and Next Steps
5.2
Device Support
5.2.1
Third-Party Products Disclaimer
5.3
Device Nomenclature
5.4
Tools and Software
5.5
Documentation Support
5.5.1
Related Documentation
5.6
Receiving Notification of Documentation Updates
5.7
Support Resources
5.8
Trademarks
5.9
Electrostatic Discharge Caution
5.10
Glossary
Package Options
Mechanical Data (Package|Pins)
RSL|48
MPQF193A
Thermal pad, mechanical data (Package|Pins)
RSL|48
QFND155N
Orderable Information
slusel8a_oa
slusel8a_pm
1
Features
Input voltage range: 4.5 V to 17 V
Output voltage range: 0.25 V to 5.5 V
Dual output supporting N+M phase configurations (N+M ≤ 12, M ≤ 6)
Intel®
VR14 SVID compliant with PSYS support
Backward compatible to VR13.HC/VR13.0 SVID
Automatic NVM fault status logging
Dynamic current limit for improved Fast-Vmode performance
Fully compatible with TI
NexFET™
power stage for high-density solutions
Enhanced D-CAP+ control to provider superior transient performance with excellent dynamic current sharing
Dynamic phase shedding with programmable thresholds for optimizing efficiency at light and heavy loads
Configurable with non-volatile memory (NVM) for low external component count
Accurate, adjustable, adaptive voltage positioning (AVP, load line) support
Individual per-phase IMON calibration, with multi-slope gain calibration to increase system accuracy.
Fast phase-adding for transient undershoot reduction
Diode braking with programmable timeout for reduced transient overshoot
Patented
AutoBalance™
current sharing
Programmable per-phase valley current limit (OCL)
PMBus™
v1.3.1 system interface for telemetry of voltage, current, power, temperature, and fault conditions
Programmable loop compensation through PMBus
Driverless configuration for efficient high- frequency switching
6 mm × 6 mm, 48-pin, QFN package