SLUSB56B November   2012  – April 2019 TPS53819A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Enable and Soft-Start
      2. 7.3.2  Adaptive On-Time Control
      3. 7.3.3  Zero Crossing Detection
      4. 7.3.4  Output Discharge Control
      5. 7.3.5  Low-Side Driver
      6. 7.3.6  High-Side Driver
      7. 7.3.7  Power Good
      8. 7.3.8  Current Sense and Overcurrent Protection
      9. 7.3.9  Overvoltage and Undervoltage Protection
      10. 7.3.10 Out-of-Bound Protection
      11. 7.3.11 UVLO Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Light-Load Condition in Auto-Skip Operation (Eco-mode)
      2. 7.4.2 Forced Continuous Conduction Mode
      3. 7.4.3 D-CAP2™ Mode
    5. 7.5 Programming
      1. 7.5.1 PMBus General Descriptions
      2. 7.5.2 PMBus Slave Address Selection
      3. 7.5.3 PMBus Address Selection
      4. 7.5.4 Supported Formats
        1. 7.5.4.1 Direct Format: Write
        2. 7.5.4.2 Combined Format: Read
        3. 7.5.4.3 Stop-Separated Reads
      5. 7.5.5 Supported PMBus Commands
      6. 7.5.6 Unsupported PMBus Commands
    6. 7.6 Register Maps
      1. 7.6.1  OPERATION [01h] (R/W Byte)
      2. 7.6.2  ON_OFF_CONFIG [02h] (R/W Byte)
      3. 7.6.3  WRITE_PROTECT [10h] (R/W Byte)
      4. 7.6.4  CLEAR_FAULTS [03h] (Send Byte)
      5. 7.6.5  STORE_DEFAULT_ALL [11h] (Send Byte)
      6. 7.6.6  RESTORE_DEFAULT_ALL [12h] (Send Byte)
      7. 7.6.7  STATUS_WORD [79h] (Read Word)
      8. 7.6.8  CUSTOM_REG (MFR_SPECIFIC_00) [D0h] (R/W Byte)
      9. 7.6.9  DELAY_CONTROL (MFR_SPECIFIC_01) [D1h] (R/W Byte)
      10. 7.6.10 MODE_SOFT_START_CONFIG (MFR_SPECIFIC_02) [D2h] (R/W Byte)
      11. 7.6.11 FREQUENCY_CONFIG (MFR_SPECIFIC_03) [D3h] (R/W Byte)
      12. 7.6.12 VOUT_ADJUSTMENT (MFR_SPECIFIC_04) [D4h] (R/W Byte)
      13. 7.6.13 Output Voltage Fine Adjustment Soft Slew Rate
      14. 7.6.14 VOUT_MARGIN (MFR_SPECIFIC_05) [D5h] (R/W Byte)
      15. 7.6.15 Output Voltage Margin Adjustment Soft-Slew Rate
      16. 7.6.16 UVLO_THRESHOLD (MFR_SPECIFIC_06) [D6h]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  Inductor (L1)
        4. 8.2.2.4  Output Capacitors (C10, C11, C12, C13, C14)
        5. 8.2.2.5  Input Capacitors (C1, C2, C3, C4, C5)
        6. 8.2.2.6  MOSFET (Q1, Q2)
        7. 8.2.2.7  VREG Bypass Capacitor (C18)
        8. 8.2.2.8  VDD Bypass Capacitor (C19)
        9. 8.2.2.9  VBST Capacitor (C7)
        10. 8.2.2.10 Snubber (C8 and R9)
        11. 8.2.2.11 Feedback Resistance, RFBH and RFBL (R17 and R18)
        12. 8.2.2.12 Overcurrent Limit (OCL) Setting Resistance (R10)
        13. 8.2.2.13 PMBus Device Address (R3 and R4)
        14. 8.2.2.14 PGOOD Pullup Resistor (R2)
        15. 8.2.2.15 SCL and SDA Pulldown Resistors (R14 and R15)
        16. 8.2.2.16 PMBus Pullup Resistors
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Typical Characteristics

TPS53819A ivdd_v_t_lusau9.pngFigure 1. VDD Supply Current vs Temperature
TPS53819A ovpuvp_v_lusau9.pngFigure 3. OVP/UVP Thresholds vs Temperature
TPS53819A wave01_lusau9.gifFigure 5. No-Load Start-Up Waveforms with DCM
TPS53819A wave03_lusau9.gifFigure 7. Full-Load Start-Up Waveforms
TPS53819A wave05_lusau9.gifFigure 9. Pre-Bias Start-Up Waveforms with FCCM
TPS53819A wave07_lusau9.gifFigure 11. No-Load Shutdown Waveforms with FCCM
TPS53819A wave09_lusau9.gifFigure 13. No-Load UVLO Start-Up Waveforms
TPS53819A wave11_lusau9.gifFigure 15. 1.2-V Output Ripple with FCCM
TPS53819A wave13_lusau9.gifFigure 17. CCM to DCM Transitions
TPS53819A wave15_lusau9.gifFigure 19. FCCM Load Transients
TPS53819A wave17_lusau9.gifFigure 21. Output Short Circuit Protection with Hiccup
TPS53819A wave19_lusau9.gifFigure 23. No-Load VOUT Adjustment Waveforms
TPS53819A fsw_v_iout425_lusau9.png
Figure 25. Switching Frequency vs. Output Current
TPS53819A fsw_v_iout750_lusau9.png
Figure 27. Switching Frequency vs. Output Current
TPS53819A linereg_lusau9.png
Figure 29. Output Voltage vs. Input Voltage
TPS53819A eff_v_iout_lusau9.png
Figure 31. Efficiency vs. Output Current
TPS53819A ivddsn_v_t_lusau9.pngFigure 2. VDD Shutdown Current vs Temperature
TPS53819A itrip_v_t_lusau9.pngFigure 4. TRIP Pin Current vs Temperature
TPS53819A wave02_lusau9.gifFigure 6. No-Load Start-Up Waveforms with FCCM
TPS53819A wave04_lusau9.gifFigure 8. Pre-Bias Start-Up Waveforms with DCM
TPS53819A wave06_lusau9.gifFigure 10. No-Load Shutdown Waveforms with DCM
TPS53819A wave08_lusau9.gifFigure 12. Full-Load Shutdown Waveforms
TPS53819A wave10_lusau9.gifFigure 14. Full-Load UVLO Start-Up Waveforms
TPS53819A wave12_lusau9.gifFigure 16. 1.2-V Output Ripple with DCM
TPS53819A wave14_lusau9.gifFigure 18. DCM to CCM Transitions
TPS53819A wave16_lusau9.gifFigure 20. DCM Load Transients
TPS53819A wave18_lusau9.gifFigure 22. Output Short Circuit Protection with Latch-off
TPS53819A wave20_lusau9.gifFigure 24. Full-Load VOUT Adjustment Waveforms
TPS53819A fsw_v_iout625_lusau9.png
Figure 26. Switching Frequency vs. Output Current
TPS53819A fsw_v_iout1_lusau9.png
Figure 28. Switching Frequency vs. Output Current
TPS53819A loadreg_lusau9.png
Figure 30. Output Voltage vs. Output Current
TPS53819A eff_v_iout_mode_lusau9.png
Figure 32. Efficiency vs. Output Current