SLUSEX7 October   2022 TPS53830A

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Device and Documentation Support
    1. 5.1 Receiving Notification of Documentation Updates
    2. 5.2 Support Resources
    3. 5.3 Trademarks
    4. 5.4 Electrostatic Discharge Caution
    5. 5.5 Glossary
  6. 6Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RWZ|35
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Single silicon design to support DDR5 applications
  • 3 Outputs to supply VDD (1.1V), VDDQ (1.1V) and VPP (1.8V), with optional 4th Output (VDD2)
  • For 3 outputs, 12 A for VDD(SWA dual phase), 6 A for VDDQ(SWC) and 5 A for VPP(SWD) with 3 outputs
  • For 4 outputs, 6 A for VDD1(SWA), 6 A for VDD2(SWB), 6 A for VDDQ(SWC), and 5 A for VPP(SWD)
  • Differential remote sense: VDD, VDDQ, and VPP
  • D-CAP+™ control for fast transient response
  • Wide input voltage: 4.5 V to 15 V
  • Programmable internal loop compensation
  • Per-phase cycle-by-cycle current limit
  • Programmable frequency: 500 kHz to 1.375 MHz
  • Support I2C and I3C Bus interface for telemetry of voltage, current, power, temperature, and fault conditions
  • Overcurrent, overvoltage, over-temperature protections
  • Persistent register (black box) feature
  • Low quiescent current
  • 5 mm × 5 mm, 35-Pin, QFN PowerPad™ package