SLVSB10F July   2012  – November 2020 TPS54020

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings (1)
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency PWM Control
      2. 8.3.2  Input Voltage and Power Input Voltage Pins (VIN and PVIN)
      3. 8.3.3  Voltage Reference (VREF)
      4. 8.3.4  Adjusting the Output Voltage
      5. 8.3.5  Safe Start-up into Prebiased Outputs
      6. 8.3.6  Error Amplifier
      7. 8.3.7  Slope Compensation
      8. 8.3.8  Enable and Adjusting Undervoltage Lockout
      9. 8.3.9  Adjustable Switching Frequency and Synchronization (RT/CLK)
      10. 8.3.10 Soft-Start (SS) Sequence
      11. 8.3.11 Power Good (PWRGD)
      12. 8.3.12 Bootstrap Voltage (BOOT) and Low Dropout Operation
      13. 8.3.13 Sequencing (SS)
      14. 8.3.14 Output Overvoltage Protection (OVP)
      15. 8.3.15 Overcurrent Protection
        1. 8.3.15.1 High-side MOSFET Overcurrent Protection
        2. 8.3.15.2 Low-side MOSFET Overcurrent Protection
      16. 8.3.16 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Single-Supply Operation
      2. 8.4.2 Split Rail Operation
      3. 8.4.3 Continuous Current Mode Operation (CCM)
      4. 8.4.4 Eco-mode Light-Load Efficiency Operation
      5. 8.4.5 Adjustable Switching Frequency (RT Mode)
      6. 8.4.6 Synchronization (CLK Mode)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Small Signal Model for Loop Response
      2. 9.1.2 Simple Small Signal Model for Peak Current Mode Control
      3. 9.1.3 Small Signal Model for Frequency Compensation
      4. 9.1.4 Designing the Device Loop Compensation
        1. 9.1.4.1 Step One: Determine the Crossover Frequency (fC)
        2. 9.1.4.2 Step Two: Determine a Value for R6
        3. 9.1.4.3 Step Three: Calculate the Compensation Zero.
        4. 9.1.4.4 Step Four: Calculate the Compensation Noise Pole.
        5. 9.1.4.5 Step Five: Calculate the Compensation Phase Boost Zero.
      5. 9.1.5 Fast Transient Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Operating Frequency
        3. 9.2.2.3  Output Inductor Selection
        4. 9.2.2.4  Output Capacitor Selection
          1. 9.2.2.4.1 Response to a Load Transient
          2. 9.2.2.4.2 Output Voltage Ripple
          3. 9.2.2.4.3 Bus Capacitance
        5. 9.2.2.5  Input Capacitor Selection
        6. 9.2.2.6  Soft-Start Capacitor Selection
        7. 9.2.2.7  Bootstrap Capacitor Selection
        8. 9.2.2.8  Undervoltage Lockout Set Point
        9. 9.2.2.9  Output Voltage Feedback Resistor Selection
          1. 9.2.2.9.1 Minimum Output Voltage
        10. 9.2.2.10 Compensation Component Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

The TPS54020 is a 17-V, 10-A, synchronous step-down (buck) converter with two integrated N-channel MOSFETs. To improve performance during line and load transients, the TPS54020 implements a constant frequency, peak current mode control which also simplifies external frequency compensation. The wide switching frequency range between 200 kHz and 1200 kHz allows for efficiency and size optimization when selecting the output filter components. A resistor to ground on the RT/CLK pin adjusts the switching frequency. The TPS54020 also has an internal phase lock loop (PLL) controlled by the RT/CLK pin that can be used to synchronize the switching cycle to the falling edge of an external system clock.

The TPS54020 starts up safely into pre-biased loads. The device implements an internal undervoltage lockout (UVLO) feature on the VIN pin with a nominal START voltage of 4 V and a nominal hysteresis of 150 mV. If the design requires more hysteresis due to an input source that droops with load or if different START and STOP thresholds are required, this functionality can be achieved by using the EN pin. The EN pin has a hysteretic internal pullup current source that can be used to adjust the input voltage UVLO with two external resistors. The total operating current for the TPS54020 is approximately 600 µA when not switching and under no load. When the TPS54020 is disabled, the supply current is typically less than 2 µA.

The integrated MOSFETs allow for high-efficiency power supply designs with continuous output currents up to 10 A. The MOSFETs are sized to optimize efficiency for low to medium duty cycle applications

The TPS54020 reduces the external component count by integrating the boot recharge circuit. A capacitor connected between the BOOT and PH pins supplies the bias voltage for the integrated high-side MOSFET. A UVLO circuit from BOOT to PH monitors the boot capacitor voltage. This monitoring ensures that the BOOT voltage is sufficient for proper high-side MOSFET gate drive current by allowing the device to pull the PH pin low to recharge the boot capacitor. The TPS54020 can operate at 100% duty cycle during transient conditions while the boot capacitor voltage is higher than the preset BOOT-PH UVLO threshold which is typically 2.1 V. The output voltage can be stepped down to as low as the 0.6-V voltage reference (VREF).

The TPS54020 has a power good comparator (PWRGD) with hysteresis which monitors the output voltage through the VSENSE pin. The PWRGD pin is an open-drain MOSFET which is pulled low when the VSENSE pin voltage is less than 91% or greater than 108% of the reference voltage (VREF) and asserts high when the VSENSE pin voltage is 95% to 104% of VREF.

The SS (soft start) pin is used to minimize inrush currents or provide power supply sequencing during power up. A small value capacitor or resistor divider should be coupled to the pin for soft start or critical power supply sequencing requirements.

The device has three preset current limit thresholds to fit 10-A, 8-A, and 6-A applications. Table 8-1 shows ILIM pin setting selections.

Table 8-1 Current Limit Thresholds
ILIM to RTN IMPEDANCE (kΩ)CURRENT LIMIT OPTION (A)
NC10
SHORT8
4996

The TPS54020 protects from output overvoltage, overload, and thermal fault conditions. The TPS54020 minimizes excessive output overvoltage transients by taking advantage of the overvoltage circuit power good comparator. When the overvoltage comparator activates, the high-side MOSFET turns off and the device prevents it from turning on until the VSENSE pin voltage is lower than 104% of VREF. The TPS54020 implements both high-side MOSFET overload protection and bi-directional, low-side MOSFET overload protection which helps control the inductor current and avoid current runaway.

The device uses hiccup or cycle-by-cycle overcurrent protection features as listed in Table 8-2.

Table 8-2 Overcurrent Protection
HICCUP TO RTN IMPEDANCECURRENT LIMIT OPTION
OPEN16384 Cycle Hiccup
SHORTCycle-Cycle

The TPS54020 shuts down if the junction temperature is higher than the thermal shutdown trip point of 175°C. Once the junction temperature drops to 10°C (typical) below the thermal shutdown trip point, the internal thermal shutdown hiccup timer begins to count. The TPS54020 restarts under the control of the soft-start circuit automatically after the thermal shutdown hiccup time reaches (16384 cycles).

The TPS54020 operates in CCM (continuous conduction mode) at load conditions where the inductor current is always positive (towards the load). To boost efficiency at lighter load conditions, the device enters pulse skipping mode and turns OFF the low-side MOSFET when inductor current tries to reverse.

For applications that require two converters to be synchronized together, the SYNC_OUT and RT/CLK pins can be used. The two converters can be configured to operate 180° out-of-phase by using the SYNC_OUT signal from one of the devices and applying it to the RT/CLK pin of the other device.