Many of the common power supply sequencing methods can be implemented using the SS, EN, and PWRGD pins. The sequential method is illustrated in Figure 8-4 using two TPS54020 devices. The power good of the first device is coupled to the EN pin of the second device which enables the second power supply once the primary supply reaches regulation.

Figure 8-5 shows the method of implementing ratio-metric sequencing by connecting the SS pins of the two devices together. The regulator outputs ramp up and reach regulation at the same time. When calculating the soft-start time, the pullup current source must be doubled in Equation 4.

Figure 8-4 Sequential Start-up Sequence

Figure 8-5 Ratiometric Start-up Sequence

Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network of RS1 and RS2 shown in Figure 8-6 to the output of the power supply to which to be tracked, or alternately another voltage reference source. Using Equation 5 and Equation 6, the tracking resistors can be calculated to initiate the V_OUT2 slightly before, after, or at the same time as V_OUT1. Equation 7 is the voltage difference between V_OUT1 and V_OUT2. To design a ratio-metric start-up where the V_OUT2 voltage is slightly greater than the V_OUT1 voltage when V_OUT2 reaches regulation, use a negative number in Equation 5 and Equation 6 for ΔV. Equation 7 results in a positive number for applications where V_OUT2 is slightly lower than V_OUT1 when V_OUT2 regulation is achieved. The ΔV variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS to VSENSE offset (V_SS(offset), 29 mV) in the soft-start circuit and the offset created by the pullup current source (I_SS, 2.3 μA) and tracking resistors, V_SS(offset) and I_SS are included as variables in the equations. To ensure start-up of V_OUT2 after a fault, the calculated RS1 value from Equation 5 must be greater than the value calculated in Equation 8.

Equation 5.

Equation 6.

Equation 7.

Equation 8.

There are two important considerations when using a resistor divider to the SS/TR pin for simultaneous start-up. First, as described in Section 8.3.11, for the PWRGD output to be active, the SS/TR voltage must be above 1.4 V max. The external divider can prevent the SS/TR voltage from charging above the threshold. For the SS/TR pin to charge above the threshold, a switch can be needed to disconnect the resistor divider or modify the resistor divider ratio of the V_OUT2 converter after start-up is complete. The PWRGD pin of the V_OUT1 converter can be used for this. One solution is to add a resistor from SS/TR of the V_OUT2 converter to the PWRGD of the V_OUT1 converter. While the PWRGD of V_OUT1 pulls low, this resistor will be in parallel with RS2. When V_OUT1 is in regulation its PWRGD pin will float. If the PWRGD pin of V_OUT1 is connected to a pullup voltage, make sure to include this in calculations. A second option is to use the PWRGD pin to turn on or turn off the external switch to change the divide ratio. The second consideration is that a pre-bias on V_OUT1 can prevent V_OUT2 from turning on. When the TPS54020 is enabled, an internal 500-Ω switch at the SS/TR pin turns on to discharge the SS/TR voltage as described in Section 8.3.10. The SS/TR pin voltage must discharge below 26 mV before the TPS54020 starts up. If the upper resistor at the SS/TR pin is too small, the SS/TR pin does not discharge below the threshold, and V_OUT2 does not ramp up. The upper resistor in the SS/TR divider may need to be increased to allow the SS/TR pin to discharge below the threshold.

Figure 8-6 Ratiometric and Simultaneous Start-up Sequence