SLVSA23A September   2009  – January 2024 TPS5410-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Electrostatic Discharge Caution
  6. 5Ordering Information
  7. 6Pin Assignments
    1. 6.1 Terminal Functions
  8. 7Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information 
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8Application Information
    1. 8.1 Functional Block Diagram
    2. 8.2 Detailed Description
      1. 8.2.1  Oscillator Frequency
      2. 8.2.2  Voltage Reference
      3. 8.2.3  Enable (ENA) and Internal Slow Start
      4. 8.2.4  Undervoltage Lockout (UVLO)
      5. 8.2.5  Boost Capacitor (BOOT)
      6. 8.2.6  Output Feedback (VSENSE)
      7. 8.2.7  Internal Compensation
      8. 8.2.8  Voltage Feed Forward
      9. 8.2.9  Pulse-Width-Modulation (PWM) Control
      10. 8.2.10 Overcurrent Liming
      11. 8.2.11 Overvoltage Protection
      12. 8.2.12 Thermal Shutdown
      13. 8.2.13 PCB Layout
      14. 8.2.14 Application Circuits
      15. 8.2.15 Design Procedure
        1. 8.2.15.1 Design Parameters
        2. 8.2.15.2 Switching Frequency
        3. 8.2.15.3 Input Capacitors
        4. 8.2.15.4 Output Filter Components
          1. 8.2.15.4.1 Inductor Selection
          2. 8.2.15.4.2 Capacitor Selection
          3.        40
          4.        41
        5. 8.2.15.5 Output Voltage Setpoint
        6. 8.2.15.6 Boot Capacitor
        7. 8.2.15.7 Catch Diode
        8. 8.2.15.8 Additional Circuits
      16. 8.2.16 Output Filter Capacitor Selection
      17. 8.2.17 External Compensation Network
    3. 8.3 Advanced Information
      1. 8.3.1 Output Voltage Limitations
      2. 8.3.2 Internal Compensation Network
      3. 8.3.3 Thermal Calculations
    4. 8.4 Performance Graphs
    5. 8.5 Performance Graphs
  10. 9Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Performance Graphs

The performance graphs in Figure 8-5 - Figure 8-12 are applicable to the circuit in Figure 8-3. TA = 25 °C. unless otherwise specified.

GUID-F515CB12-03D0-4F58-93DA-943A1776C403-low.gifFigure 8-5 Efficiency vs. Output Current
GUID-7F7591B4-A3FE-4EC5-A993-30AF385BA4AC-low.gifFigure 8-7 Output Voltage Regulation % vs. Input Voltage
GUID-1762C034-A1C2-4F15-823B-B5925E9D58A1-low.gifFigure 8-9 Output Voltage Ripple and PH Node, IO = 1 A
GUID-A17C0FB3-4FAC-43F2-82A5-DB23887206B5-low.gifFigure 8-11 Startup Waveform, VI and VO
GUID-964161D0-E8C9-495C-B1DA-227C53EE7370-low.gifFigure 8-6 Output Voltage Regulation % vs. Output Current
GUID-D166F950-E20F-4A7B-A245-17C30F75EF19-low.gifFigure 8-8 Input Voltage Ripple and PH Node, IO = 1 A
GUID-979586FB-BCFD-4CE3-A8CE-804BC33E6DC4-low.gifFigure 8-10 Transient Response, IO Step 0.25 to 0.75 A
GUID-CB9032F8-9E68-4B49-98DE-3AF49EEC4120-low.gifFigure 8-12 Startup Waveform, ENA and VO