SLVS996D September   2009  – September 2015 TPS54262-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 DC Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Unregulated Input Voltage
      2. 7.3.2  Regulated Output Voltage
      3. 7.3.3  Regulation and Feedback Voltage
      4. 7.3.4  Enable and Shutdown
      5. 7.3.5  Soft Start
      6. 7.3.6  Oscillator Frequency
        1. 7.3.6.1 Selecting the Switching Frequency
        2. 7.3.6.2 Synchronization With External Clock
      7. 7.3.7  Slew Rate Control
      8. 7.3.8  Reset
      9. 7.3.9  Reset Delay
      10. 7.3.10 Reset Threshold and Undervoltage Threshold
      11. 7.3.11 Overvoltage Supervisor
      12. 7.3.12 Noise Filter on RST_TH and OV_TH Terminals
      13. 7.3.13 Boot Capacitor
      14. 7.3.14 Short Circuit Protection
      15. 7.3.15 Overcurrent Protection
      16. 7.3.16 Internal Undervoltage Lockout (UVLO)
      17. 7.3.17 Thermal Shutdown (TSD)
      18. 7.3.18 Loop Control Frequency Compensation - Type 3
        1. 7.3.18.1 Bode Plot of Converter Gain
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode Continuous Conduction Mode (CCM)
      2. 7.4.2 Active Mode Discontinuous Conduction Mode (DCM)
      3. 7.4.3 Pulse Skip Mode (PSM)
      4. 7.4.4 Low-Power Mode (LPM)
      5. 7.4.5 Hysteretic Mode
      6. 7.4.6 Output Tolerances in Different Modes of Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection
          1. 8.2.2.1.1  Input Capacitors (C1, C11)
          2. 8.2.2.1.2  Output Capacitor (C4, C12)
          3. 8.2.2.1.3  Soft-Start Capacitor (C6)
          4. 8.2.2.1.4  Bootstrap Capacitor (C3)
          5. 8.2.2.1.5  Power-On Reset Delay (PORdly) Capacitor (C2)
          6. 8.2.2.1.6  Output Inductor (L1)
          7. 8.2.2.1.7  Flyback Schottky Diode (D2)
          8. 8.2.2.1.8  Resistor to Set Slew Rate (R7)
          9. 8.2.2.1.9  Resistor to Select Switching Frequency (R8)
          10. 8.2.2.1.10 Resistors to Select Output Voltage (R4, R5)
          11. 8.2.2.1.11 Resistors to Set Undervoltage, Overvoltage, and Reset Thresholds (R1, R2, R3)
            1. 8.2.2.1.11.1 Overvoltage Resistor Selection
            2. 8.2.2.1.11.2 Reset Threshold Resistor Selection
            3. 8.2.2.1.11.3 Undervoltage Threshold for Low-Power Mode and Load Transient Operation
          12. 8.2.2.1.12 Low-Power Mode (LPM) Threshold
          13. 8.2.2.1.13 Enable Pin Pull-Up Resistor (R11) and Voltage Divider Resistor (R10)
          14. 8.2.2.1.14 Pull-Up Resistor (R12) at RST Pin
          15. 8.2.2.1.15 Type 3 Compensation Components (R5, R6, R9, C5, C7, C8)
            1. 8.2.2.1.15.1 Resistors
            2. 8.2.2.1.15.2 Capacitors
          16. 8.2.2.1.16 Noise Filter on RST_TH and OV_TH Terminals (C9, C10)
        2. 8.2.2.2 Design Example 1
          1. 8.2.2.2.1  Calculate the Switching Frequency (fsw)
          2. 8.2.2.2.2  Calculate the Ripple Current (IRipple)
          3. 8.2.2.2.3  Calculate the Inductor Value (L1)
          4. 8.2.2.2.4  Calculate the Output Capacitor and ESR (C4)
            1. 8.2.2.2.4.1 Calculate capacitance
            2. 8.2.2.2.4.2 Calculate ESR
          5. 8.2.2.2.5  Calculate the Feedback Resistors (R4, R5)
          6. 8.2.2.2.6  Calculate Type 3 Compensation Components
            1. 8.2.2.2.6.1 Resistances (R6, R9)
            2. 8.2.2.2.6.2 Capacitors (C5, C8, C7)
          7. 8.2.2.2.7  Calculate Soft-Start Capacitor (C6)
          8. 8.2.2.2.8  Calculate Bootstrap Capacitor (C3)
          9. 8.2.2.2.9  Calculate Power-On Reset Delay Capacitor (C2)
          10. 8.2.2.2.10 Calculate Input Capacitor (C1, C11)
          11. 8.2.2.2.11 Calculate Resistors to Control Slew Rate (R7)
          12. 8.2.2.2.12 Resistors to Select Undervoltage, Overvoltage and Reset Threshold Values (R1, R2, R3)
          13. 8.2.2.2.13 Diode D1 and D2 Selection
          14. 8.2.2.2.14 Noise Filter on RST_TH and OV_TH Terminals (C9 and C10)
          15. 8.2.2.2.15 Power Budget and Temperature Estimation
        3. 8.2.2.3 Design Example 2
          1. 8.2.2.3.1  Calculate the Switching Frequency (fsw)
          2. 8.2.2.3.2  Calculate the Ripple Current (IRipple)
          3. 8.2.2.3.3  Calculate the Inductor Value (L1)
          4. 8.2.2.3.4  Calculate the Output Capacitor and ESR (C4, C12)
            1. 8.2.2.3.4.1 Calculate Capacitance
            2. 8.2.2.3.4.2 Calculate ESR
          5. 8.2.2.3.5  Calculate the Feedback Resistors (R4, R5)
          6. 8.2.2.3.6  Calculate Type 3 Compensation Components
            1. 8.2.2.3.6.1 Resistances (R6, R9)
            2. 8.2.2.3.6.2 Capacitors (C5, C8, C7)
          7. 8.2.2.3.7  Calculate Soft-Start Capacitor (C6)
          8. 8.2.2.3.8  Calculate Bootstrap Capacitor (C3)
          9. 8.2.2.3.9  Calculate Power-On Reset Delay Capacitor (C2)
          10. 8.2.2.3.10 Calculate Input Capacitor (C1, C11)
          11. 8.2.2.3.11 Calculate Resistors to Control Slew Rate (R7)
          12. 8.2.2.3.12 Resistors to Select Undervoltage, Overvoltage and Reset Threshold Values (R1, R2, R3)
          13. 8.2.2.3.13 Diode D1 and D2 Selection
          14. 8.2.2.3.14 Noise Filter on RST_TH and OV_TH Terminals (C9 and C10)
          15. 8.2.2.3.15 Power Budget and Temperature Estimation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation and Temperature Considerations
  11. 11Device and Documentation Support
    1. 11.1 Community Resource
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PWP Package
20-Pin HTSSOP
Top View
TPS54262-Q1 po_lvs996.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
NC 1 NC Connect to ground.
NC 2 NC Connect to ground.
SYNC 3 I External synchronization clock input to override the internal oscillator clock. An internal pulldown resistor of 62 kΩ (typical) is connected to ground. Connect this pin to GND if not used.
LPM 4 I Low-power mode control using digital input signal. An internal pulldown resistor of 62 kΩ (typical) is connected to ground.
EN 5 I Enable pin, internally pulled up. Must be externally pulled up or down to enable or disable the device.
RT 6 O External resistor to ground to program the internal oscillator frequency.
Rslew 7 O External resistor to ground to control the slew rate of internal switching FET.
RST 8 O Active low, open-drain reset output connected to external bias voltage through a resistor, asserted high after the device starts regulating.
Cdly 9 O External capacitor to ground to program power on reset delay.
GND 10 O Ground pin, must be electrically connected to the exposed pad on the PCB for proper thermal performance.
SS 11 O External capacitor to ground to program soft-start time.
OV_TH 12 I Sense input for overvoltage detection on regulated output, an external resistor network is connected between VReg and ground to program the overvoltage threshold.
RST_TH 13 I Sense input for undervoltage detection on regulated output, an external resistor network is connected between VReg and ground to program the reset and undervoltage threshold.
VSENSE 14 I Inverting node of error amplifier for voltage mode control.
COMP 15 O Error amplifier output to connect external compensation components.
VReg 16 I Internal low-side FET to load output during start-up or limit overshoot.
PH 17 O Source of the internal switching FET.
VIN 18 I Unregulated input voltage. Pin 18 and pin 19 must be connected externally.
VIN 19 I Unregulated input voltage. Pin 18 and pin 19 must be connected externally.
BOOT 20 O External bootstrap capacitor to PH to drive the gate of the internal switching FET.