SLVS632K January 2006 – January 2024 TPS5430 , TPS5431
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
BOOT | 1 | O | Boost capacitor for the high-side FET gate driver. Connect 0.01 μF low ESR capacitor from BOOT pin to PH pin. |
NC | 2, 3 | — | Not connected internally. |
VSENSE | 4 | I | Feedback voltage for the regulator. Connect to output voltage divider. |
ENA | 5 | I | On and off control. Below 0.5 V, the device stops switching. Float the pin to enable. |
GND | 6 | — | Ground. Connect to DAP. |
VIN | 7 | — | Input supply voltage. Bypass VIN pin to GND pin close to device package with a high quality, low ESR ceramic capacitor. |
PH | 8 | I | Source of the high side power MOSFET. Connected to external inductor and diode. |
DAP | — | GND pin must be connected to the exposed pad for proper operation. |