SLVS975C September   2009  – April 2018 TPS54318

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Efficiency vs Output Current
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation and Output Current
      3. 7.3.3  Bootstrap Voltage (Boot) and Low Dropout Operation
      4. 7.3.4  Error Amplifier
      5. 7.3.5  Voltage Reference
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Soft-Start Pin
      9. 7.3.9  Sequencing
      10. 7.3.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      11. 7.3.11 Overcurrent Protection
      12. 7.3.12 Frequency Shift
      13. 7.3.13 Reverse Overcurrent Protection
      14. 7.3.14 Synchronize Using the RT/CLK Pin
      15. 7.3.15 Power Good (PWRGD Pin)
      16. 7.3.16 Overvoltage Transient Protection
      17. 7.3.17 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Small Signal Model for Loop Response
      2. 7.4.2 Simple Small Signal Model for Peak Current Mode Control
      3. 7.4.3 Small Signal Model for Frequency Compensation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Step One: Select the Switching Frequency
        2. 8.2.2.2  Step Two: Select the Output Inductor
        3. 8.2.2.3  Step Three: Choose the Output Capacitor
        4. 8.2.2.4  Step Four: Select the Input Capacitor
        5. 8.2.2.5  Step Five: Minimum Load DC COMP Voltage
        6. 8.2.2.6  Step Six: Choose the Soft-Start Capacitor
        7. 8.2.2.7  Step Seven: Select the Bootstrap Capacitor
        8. 8.2.2.8  Step Eight: Undervoltage Lockout Threshold
        9. 8.2.2.9  Step Nine: Select Output Voltage and Feedback Resistors
          1. 8.2.2.9.1 Output Voltage Limitations
        10. 8.2.2.10 Step 10: Select Loop Compensation Components
        11. 8.2.2.11 Power Dissipation Estimate
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Custom Design With WEBENCH® Tools
      2. 11.1.2 Development Support
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.8 Soft-Start Pin

The TPS54318 device regulates to the lower of the SS pin and the internal reference voltage. A capacitor on the SS pin to ground implements a soft-start time. The TPS54318 device has an internal pull-up current source of 1.8 μA which charges the external soft-start capacitor. Equation 4 calculates the required soft-start capacitor value where tSS is the desired soft-start time in ms, ISS is the internal soft-start charging current of 1.8 μA, and VREF is the internal voltage reference of 0.8 V. it is recommended to maintain the soft-start time in the range between 1 ms and 10 ms.

Equation 4. TPS54318 q_css_slvs946.gif

where

  • CSS is in nF
  • tSS is in ms
  • ISS is in µA
  • VREF is in V

If during normal operation, the input voltage goes below the UVLO, EN pin pulled below 1.2 V, or a thermal shutdown event occurs, the TPS54318 device stops switching and the SS is discharged to 0 volts before reinitiating a powering up sequence.